LightRAM: A Self-Refreshing Optical Memory Cell Demonstrator
Project Summary
LightRAM is a proposed optical/electrical memory-cell concept where a stored electrical state controls whether light can pass through an active layer. If light passes through, a photovoltaic detector layer reads the bit and can also refresh the stored state.
The goal of this Hackaday project is not to build a semiconductor RAM chip. The goal is to build a bench-top proof-of-concept single-cell demonstrator that shows the feedback loop works:
stored gate charge → active optical layer opens → light reaches PV detector → PV output reads 1 → PV feedback refreshes the stored charge
A drained gate blocks the light, so the PV receives nothing and the cell remains at 0.
This gives two stable states:
0 state: gate drained → active layer opaque → PV dark → no recharge → remains 0 1 state: gate charged → active layer transparent → PV lit → PV refreshes gate → remains 1
Core Idea
The LightRAM cell consists of five functional layers:
Shared light source ↓ Read/write mask ↓ Active optical switch layer ↓ Floating-gate / storage node ↓ PV detector / refresh layer
The stored bit is not read by electrically measuring the floating gate. Instead, the floating gate only biases the active optical layer.
The PV layer asks a simple question:
Did light get through?
If yes, the latch reads 1.
If no, the latch reads 0.
This is important because the read can be non-destructive: the stored charge is not directly drained during read.
Demonstrator Goals
The first prototype should demonstrate:
- A charged storage node opens an optical path.
- A discharged storage node closes the optical path.
- A PV or photodiode detects whether light passed through.
- The PV signal can be sent to a latch/comparator as the read output.
- The PV signal can also feed back and help maintain the charged
1state. - A drain/reset path can deliberately force the cell back to
0. - A small priming pulse can write a
1from a0state.
Simplified Bench-Top Version
A real LightRAM cell might use nanoscale electro-absorption, ITO/ENZ, ferroelectric, or other active optical materials. For a hobby demonstrator, we can substitute larger, slower parts.
Possible substitutes:
Shared light source: LED or laser diode Active optical layer: LCD shutter, electrochromic film, polarizer pair with voltage-controlled LCD film, or any electrically controlled optical attenuator Floating gate / storage node: small capacitor, MOSFET gate capacitance, or high-impedance storage node PV layer: photodiode, phototransistor, or small solar cell Latch/SRAM output: comparator, Schmitt trigger, flip-flop, Arduino/ESP32 input, or logic latch Write 1: small priming voltage pulse into the storage node Write 0: controlled drain/reset path to ground
One-Bit Cell Logic
State 0
storage node low active layer blocks light PV detector sees no light latch reads 0 feedback path inactive
The cell stays at 0 because the active layer prevents light from reaching the PV detector.
Write 1
apply small priming pulse to storage node active layer becomes partially transparent light reaches PV detector PV output rises PV feedback reinforces storage node cell catches into 1 state
The priming pulse does not necessarily need to fully charge the storage node. It only needs to push the active layer far enough open that the PV feedback can take over.
State 1
storage node high active layer transparent PV detector receives light latch reads 1 PV feedback maintains storage node
This creates a self-refreshing 1.
Write 0
activate drain/reset path storage node discharges active layer closes PV detector goes dark latch reads 0 after next read cell remains 0
Important Design Detail: Read vs Refresh
The PV layer can serve two paths:
PV output ├── read path → latch / comparator / SRAM └── feedback path → storage node top-up
These should be separately controlled.
During a real read:
PV...Read more »
RareSaturn
Dr. Cockroach
Brent Nelson
Jasper Sikken
Nicola Cimmino