Most people assume designing a GPU requires hundreds of engineers,
sub-10nm fabs, and million-dollar budgets. This project challenges
that assumption.

NovaGPU TS 1T is a complete GPU in synthesizable Verilog RTL,
designed from scratch with a custom token dataflow architecture
called N.E.O.N. Instead of a scheduler dispatching instructions,
the data itself triggers execution — no warp scheduler, no idle
cycles.

The pipeline includes: PCIe 4.0, Token Matching Unit, Shader
Cluster with custom 8-opcode ISA, hardware BVH ray tracing (TTU),
frame generation without AI (MVU), Pineda triangle rasterizer,
dual-port SRAM, and specialized accelerators for vegetation,
water, geometry prediction, and post-processing.

Current state: 14 RTL modules complete, synthesis and place & route successful, targeting Artix-7, 47/48 tests passing, 3D animations produced
directly from RTL simulation.

One developer. Open source tools. MIT license.

Repository: https://github.co