Salah_Eddine
Anyone who has taken a digital electronics course knows that one of the first combinational logic exercises is designing a BCD-to-7-segment decoder
The usual design process begins with the truth table
followed by deriving the Boolean expressions for each output segment.
There are several ways to simplify Boolean expressions, but my favorite is
the Karnaugh map because it produces minimized logic expressions in a clear and intuitive way.
Once the simplified equations are obtained, the final step is to implement them using logic gates
For this project, I decided to use only AND and OR gates (along with the required input inversions). I know some of you might call me a masochist for not using XOR gates, but I wanted to challenge myself by working only with the basic logic gates.
I hope you enjoy the project, and as always, any feedback or suggestions are greatly appreciated.
Thank you very much for your interest I have already simulated the circuit, and the results show that the design is working perfectly . I will also check the 7447 TTL decoder datasheet and compare my circuit with the internal gate diagram to further verify that everything matches correctly i truly appreciate your helpful suggestion