Kransputer

This CMOS homebrew computer started with one 2N7000 and one resistor, and with me not knowing what a logic gate looked like on the inside.

A MOSFET is a switch. Put the gate below its threshold voltage and it is an open circuit. Put it above and it is close to a short. The gate itself draws no current, which is the whole reason you can chain thousands of these together without the first one running out of drive.

Wire one from the output down to ground, put a resistor from the output up to the supply, and feed the gate. Input at 0 V, the transistor is off, the resistor pulls the output to 5 V. Input at 5 V, the transistor is on, it wins against the resistor, output goes to 0 V.

That is a NOT gate, and it is the entire foundation.

Put two transistors side by side under the same resistor and either one pulls the output down. Output is high only when both inputs are low. That is NOR.

Then I tried to build an OR gate

The obvious idea: I do not want the inversion, so move the resistor to the other side. Put it between the transistor and ground, take the output from between them. Now a high input gives a high output. No inversion.

Topologically that is fine. Electrically it collapses.

The transistor only conducts while its gate sits above its source by more than the threshold. In this arrangement the source is the output. As the output rises, the gate-to-source voltage falls, and the transistor throttles itself. Feed 5 V into the gate and the output stops somewhere around 3 V.

One stage of that is survivable. Feed those 3 V into an identical stage and you come out around 1 V, which is below the threshold. Two stages deep the signal is dead. You have built an attenuator.

The fix is not a better resistor. The fix is that a stage which only pulls one way restores the signal, because the output is tied hard to a rail rather than sitting somewhere between them. And a stage that only pulls down produces a low output for a high input.

So every gate inverts. Not as a convention, not as a style — as a consequence of how the device works.

What that costs

You buy signal restoration with an inversion, and you pay for the non-inverting functions with an extra stage:

This is backwards from how the functions are usually taught. AND and OR are the simple ones on paper and the expensive ones in silicon; NAND and NOR are the awkward ones on paper and the cheap ones in silicon. AND is a NAND with an inverter bolted on, and you pay two transistors for the privilege of not inverting.

Every architectural decision later in this project is downstream of that table.

The mistake worth recording

Asked what two transistors in series under a pull-up would do, I said AND. It is NAND.

I had established the inversion rule about four minutes earlier and immediately forgot to apply it. That is worth writing down because it is the specific error everybody makes at this point: you reason correctly about the pull-down network, work out that both inputs have to be high for current to flow, and then forget that current flowing means the output goes low.

The rule that fixes it permanently:

The pull-down network can only ever add paths to ground as inputs go high. More inputs high means more pull-down, means lower output. A stack of transistors is therefore always a decreasing function of its inputs.

Anything that needs to go up when an input goes up needs a second stage. There is no arrangement of pull-downs that avoids it.

That constraint is about to become expensive, because there is one very common gate whose truth table does not decrease and does not increase. Next post: XOR, and why it sets the price of every adder ever built.