A 30-Year-Old Guitar Amp Circuit Stores Neural Network Weights
— DTL Ternary Cell, Public Domain

The same DTL circuit I designed in the 1990s for 3-channel tube amplifier
footswitching is a ternary memory cell storing {-1, 0, +1} neural network
weights — one transistor per weight, no clock, no refresh, 30 years of
production hardware behind it.

I designed this circuit in the 1990s for a 3-channel tube amplifier.
Channel A. Channel B. Channel C. One button selects any channel directly
from any other — one press, no intermediate off state. One green LED on
at all times. The switching is instant, clean, and glitch-free inside a
100-watt tube amp chassis — one of the most electrically hostile
environments you can put a low-level switching circuit into.

I have built 3-way, 4-way, and 6-way versions. All in production. All
deployed in real amplifiers.

In 2026 I recognized it as something else.

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WHAT THE CIRCUIT IS
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Three positions. One transistor always conducting. The switching is done
by the diode array operating on unbalanced contact potential — not by the
transistors. The transistors are output stages. The diodes make the
decision.

Each position: B+ through a pull-up resistor to a node. From that node:
one diode to its own transistor base, and diode connections to all other
positions' collectors.

When position 1 is active (transistor conducting, collector LOW):

  Active collector LOW + one diode drop  =  ~0.8V at positions 2 and 3
  Two diode drops required to drive base  =  ~1.2V minimum threshold
  0.8V < 1.2V — positions 2 and 3 cannot conduct

The two inactive collectors are HIGH. Those two HIGH collectors feed
current through their diodes back to position 1's base — sustaining it
above threshold. Position 1 holds indefinitely. No clock. No stored
charge. No capacitor. No external hold signal.

One transistor always conducts. One current path: B+ → R → collector → GND.
The designer sets R. The designer sets the margin. The gap between 0.8V
and 1.2V is the hold. Supply voltage controls immunity.

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WHY IT IS TERNARY
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Three stable states. One always active. Position is meaning.

  Position 1 active  =  {-1}   negative weight
  Position 2 active  =  {0}    zero weight
  Position 3 active  =  {+1}   positive weight

This is exactly the ternary quantization scheme used in ternary neural
network inference — including Microsoft's BitNet b1.58 and related
architectures. Every weight in a ternary-quantized model is one of
{-1, 0, +1}. One DTL cell stores exactly one weight. One transistor.
No binary encoding. No decode. Position is the value.

Compare to binary SRAM:
  SRAM stores one weight value in 7-8 flip-flops = 42-48 transistors.
  DTL ternary stores the same value in 1 transistor.
  No clock. No refresh. No forbidden state.

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N-ARY BY NATURE
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The circuit does not have a preferred base. The diode contact potential
mechanism works identically for any N.

  N=2:    binary flip-flop. No clock. No forbidden state.
  N=3:    ternary trit. {-1, 0, +1}. One transistor per neural weight.
  N=4:    ternary plus idle. Position 4 = weight not loaded.
  N=6:    six-position selector. Built and deployed in hardware.
  N=18:   LTSpice verified (CYR_OneHot_18way_v3.cir).
  N=128:  one-hot ASCII storage. Full character set. One transistor per
          character. Detailed in the previous Hackaday release:
       ...