VGA, shared RAM, and the seven-pixel problem

Retrospective build log: video experiments and the 2023 breadboard redesign.

The first video experiments were simple: wire up enough logic to generate a signal, display color bars, then display text. Getting a stable picture was already satisfying, but Lode Runner made graphics unavoidable.

The Apple II became the useful behavioral target. It had a software library I wanted and graphics simple enough to study at the circuit level. My design did not become a copied Apple II schematic; it became a different machine that reproduced enough behavior for selected software to run.

Two problems made the video especially interesting. First, the CPU and video hardware share RAM. They must take turns on the bus, with the video path reading data and loading shift registers at the right time. Second, high-resolution Apple II graphics use seven displayed pixels per byte, while another bit changes the color behavior.

The Apple II relies on NTSC artifact color. My output is VGA, so I needed logic to recreate that behavior rather than depend on a television decoder. A 4046 PLL was part of the experiments to produce the related pixel timing.

The working result is why the video system is the part I am proudest of. A game moving on the monitor is also a demonstration that the clocking, memory access and output logic agree.

These videos show experiments, including an intermediate GAL implementation. The later build replaced the 22V10 with discrete logic.

Breadboard redesign:

Color experiments and the plan:

Language-card and banking work: