It's exciting weekend time here at Bauer Labs!

A pile of PCBs has plopped itself upon my bench thusly...

which, after my toaster-oven-reflow treatment, had a few solder bridges that needed removing...

And then a bit of programming...

A tiny bit of case painting (yes, I could have sanded it down a little, but I'm impatient!)...

and voilá, Bob's your uncle.

Fully buttoned up:

I'm in a little bit of disbelief here. This has been a six-year journey of learning about FPGAs to get to the point where I could design and build this thing. I had no idea that I'd be able to support multiple boot images using the stock ProFile interface card; or that I'd be able to mount multiple volumes at the same time from ProDOS. Nor that I'd be able to support full 32MB volumes. Heck, I didn't even know that I'd be able to wrap my head around FPGAs.

But here we are.

The last piece for me to do is publish all the code, which I'll be doing shortly; I just need to clean up the repo (there are hundreds of useless artifacts I'm not going to pollute the world with). Look for a link in the project description to my github when it's done. The schematic, code, and case STL should all be there in the near future...