So after being on a pesky vacation for a week, I put together a plan for construction of the TTL version. I wanted to be able to test as I go, so I figured I'd order the module construction sequence so I could check the system functionality before moving to the next part. Now I just have to acquire the parts...
- Clock circuit with single-step mode
- Program counter (low byte only)
- Instruction ROM
- Src and Dst registers
- Control state machine - 3-bit shift reg
- Decoding ROMs
- Load reg
- ALU A
- ALU chips
- ALU result reg
- AEB register
- Pointer address register
- ROM data tristate buffer (read byte at PC)
- PC buffer
- Data Ram register (may need to modify to store lower 7 bits of either dst or src so they can be buffered to the ROM)
- RAM
- UART
- Expand PC and data ram high byte
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