I got the program counter chip simulated in VHDL and test benched. I added two of them into the top-level datapath. And added the high-byte temporary register. Simulated it again and it works just fine.
The only problem I didn't realize is I can't read the program counter as is. I can write to it, but the output is connected to the RAM chips. I would have to add some tri-state buffers to get the address out to the data bus which means 2 more chips. I'm aiming at minimal chip count, so I'll put this as an extra feature. I'm not sure how important it is to do read the program counter. Perhaps if you wanted to do a local jump you could read the value, add an offset, and write it back.
This project is coming along well. I have most of the important stuff in. I could start my build now if I wanted to. All of the important parts are there to run a program. But I think I'd like to make it a little more useful. I need to put the data RAM access in, and then I need to work on the I/O. And maybe a bootloader ROM.
FYI: 14 chips so far without address decoding which I expect to add maybe 2-3 more. Pretty good for how much it can do.
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Reading PC is important for a few things, such as relative jumps (essential for position-independent code), call (so you can return), exceptions, interrupts, debugging/single-step...
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Right. Forgot about pushing it on the stack so you can return. I don't have any exceptions or interrupts planned (yet) but I may. They are just so handy. I think it will cost me a couple more tri-state buffers. It's coming off the output port from the counters, so I could pass that to the data bus. Every chip matters, so I don't want my count going up too much.
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