-
v.0.11.0 - Microcoded ROM
07/10/2017 at 20:56 • 0 commentsFinally upgraded from the archaic IC's of microcodes with combinatorial logic to ROM, still in Logisim.
In real hardware will be used 3 of the AT28C256 EEPROM in parallel. It's a huge waste of space, I know, but there aren't smaller chips, or the cost is almost the same.
PS. Now there is a LCD output, and a test program to print an 'A' char. All ready to make a classic Hello World program!
-
Week (almost zero) progress
07/06/2017 at 13:19 • 0 commentsThis week seen very little progress, as I'm stuck in personal problems, like a minor car crash...
That being said, let's move on.
It's amazing how silly things you ignored/disdained for a long, long time suddenly shows up and you perceive how incredibly useful they are! It's pretty like a Eureka moment.
Yes, I'm talking about you, Pull Up/Down resistors. These guys, in conjunction with 3-state buffers, are all you need to make bus-driven circuits. -
Project decisions. The trade-off hell
06/27/2017 at 20:34 • 0 commentsRegarding the problem faced on last log entry, I haven't decided yet, but I'm inclined to solve it as follows:
Change the single Execute phase for a dual phase. It makes possible to use any of the registers as both ALU A and B in. All the registers will have its outputs connected together (bus), so only one can be read at a time. The first Execute step would load R1 value in a (new) input temporary register for the ALU A input. In the next step (Execute 2), the R2 value would be driven to ALU B input normally, and (almost) immediatelly the result would be available at ALU output, ready to be loaded in R1 input when CLK-B rises at middle of Execute step 2.
This approach has the notable advantage of barely add hardware complexity (only one new register) while making the Instruction set code far more confortable by allowing all registers to act as both two inputs and the output of ALU.
The main disadvantages is the speed penalty, 25% slower, but I think it's manageable, and one step entirely useless in all non ALU operations. That doesn't make me anyway happy, but...
PS. Just added a list of parts. It's preliminar, and some quantities are very overestimated, as the demux.
Cheers!
-
Project decision regarding registers
06/26/2017 at 21:00 • 0 commentsAlmost done, but got stuck with register problems, which ones will be source and destiny of instructions.
In case of ALU there are two sources. And to make things worse, the two inputs of the 74LS181 ALU haven't same powers, the A input has a lot more functions allowed.
It's easy to permit all registers to work in all roles in a software simulator like Logisim, but when it comes to use real chips it becomes a nightmare due to the huge quantity of controlled 3-state buffers (74LS244) required to control the data flow.
-
Problems with 74181
06/21/2017 at 22:33 • 0 commentsNothing is as easy as it seems at first glance. A simple 8 bit add is making my day worse.
Problem is explained in this electric stackexchange question I opened: https://electronics.stackexchange.com/questions/312354/74181-alu-not-working-properly-cascaded-to-add-8-bit-numbers/
As a fun note, I just discovered that the standard Windows 7 calc has a very useful programmer mode, which makes life a lot easier while I haven't finished the Assembler program.
-
Assembler program in C#
06/21/2017 at 01:02 • 0 commentsUpdating project status:
Now developing an Assembler program in C#, to simplify the task of making programs to test the CPU.
The program should take an entry in Assembly language, such as LD A, 0x7 and convert it in the corresponding bytes.
As the parts of the instruction aren't multiples of 4 (half a byte, or nibble) they can't be directly converted to hexadacimal characters.
For example, the opcodes are 6 bits long, the R1 address 3 bits, and so on...
-
Almost done (on circuit simulator)
06/19/2017 at 00:05 • 0 comments8 bit CPU with almost all instructions working fine, ALU implemented (2x 74181).
Just 2 or 3 instructions more and it will be completed.
Meanwhile the parts for the real CPU on breadboards are ordered, just waiting for delivery (rarely under 45 days in my country).
-
8 bit CPU desing progress
06/17/2017 at 16:19 • 0 commentsGreat progress today, some instructions already working on Logisim (check it out the files on github).
But...
I figured out that for this design to work, there will be necessary two 3-state output drivers (sixteen gates) in the out of each register (and there are are 8 registers...).
24 chips only for registers is a huge overkill for a home cpu. Imagine the mess of dozens of wires on 4 (or more) breadboards... JUST for registers!
Going back to paper and redefine it. Maybe it may be needed to fix the ALU A input and output to one register. Many homebrew and old CPUs use this approach, it's the "Accumulator" register. Always wanted to know why, now I know...
These design trade-offs are driving me crazy.
-
74181 ALU study
06/14/2017 at 21:29 • 0 commentsStatus: Studying the classic 74181 ALU chip.
Some useful resources I found:
Library of 74xx chips for Logisim
http://www.righto.com/2017/03/inside-vintage-74181-alu-chip-how-it.html#fn:hackers
http://apollo181.wixsite.com/apollo181/shift-right-with-74181
Hope that helps someone as helped me. This ALU has odd functions, it's not easy to understand it.
I also made a test circuit to make sure two ALUs work well together (remember, 74181 is a 4 bit ALU).
All available on github.
-
2nd gen CPU Started!
06/12/2017 at 20:04 • 0 commentsStarting design of 2nd generation CPU (8 bit, focusing on real TTL chips, ready for implementation) on Logisim.
It's impressive how the experience won in the previous project makes everything a lot easier.
Available on github. Still in version 0.2, a long way from finish,