Opcode map

As of 20180112:

opcode value	R/I8	name	Imm8	cond	Reg SRC	flag	description
0h		OR				SZ	DST = SRC \| DST
1h		XOR				SZ	DST = SRC ^ DST
2h		AND				SZ	DST = SRC & DST
3h		ANDN				SZ	DST = SRC & ~DST
4h		CMPU				CSZ	CoMPare, Unsigned (SUB with no write)
5h		CMPS				CSZ	CoMPare, Signed (SUB with no write, MSB tweaked)
6h		SUB				CSZ	DST=SRC+ (-DST)
7h		ADD				CSZ	DST = SRC + DST
8h		SHR				SZ	SHift Right
9h		SHL				SZ	SHift Left
Ah		SAR				SZ	Shift Arithmetic Right
Bh		ROL				SZ	ROtate Left
Ch	0	IN		NO	NO		Read INput port
Ch	1	OUT		NO	NO		Write OUTput port
Dh	0	LDCL	NO			SZ?	Load Constant Low (read instr memory)
Dh	1	LDCH	NO			SZ?	Load Constant High (read instr memory)
Eh		MOV				SZ	Copy register value
Fh		CALL				SZ?	SRC=>PC, PC+1=>DST
FFh		OVL				SZ?	Halts core, wait for loading of OVerLay. Special case of CALL PC (SRC=>PC)
FFFFh	1	INV		NO		SZ?	INValid instruction (halt core) Special case of OVL FFh

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