The pressure on the ISA increases and I am already forced to squeeze 2 instructions in the IN and LCDL opcodes. Naturally I'm looking at the shifting/shuffling/barrel shifter and the 4 opcodes.

Things have changed since the last time because the short immediate is now a signed 4-bits field ! This means that an opcode such as ROR can encode both left and right directions, saving space in the opcode map.

SHL, SHR => SH
ROL, ROR => ROT

There are also two other desirable variations :

• Rotate through Carry (not sure it is really necessary with all the predicated instructions ?)
• Shift Arithmetic

With Imm4, there is no use for the Imm8 field now as well, which saves another bit. The shifter will use only two opcodes by moving the arithmetic flag/carry flag in the R/I8 flag.

What could these opcodes be used for ? They should remain reserved for now but I can already see the Imm8 extended back to 9 bits for the IN and OUT opcodes, leaving one remaining free opcode slot...