DekatronPC

I got two 9-track Tape recorders for my lamp computer.

Yeah!!!! I got 22 pcs of fast soviet dekatron-selectron A103 - It can count on 50kHz! (But A110 Can handle up to 1MHz - I also have them)

I need only 17 for Dekatron PC, so now I have enough dekatrons to build machine...

One module contain 128 * 16 bits of ferrite core memory

What's inside? a lot of thin ferrite plates with a lot of holes

It's perfect inside:

And I have 16 of them!

Great gift from my subscriber.

I'l use this connector to interconnect lamp computer blocks.

This strange devices are used for reading punched card with 14x32 holes. In some holes short-cut turn should be placed.  If turn is presented - coil return signal corresponded to log. 1, if not - log.0

I will use this devices in DekatronPC to input my programs into PC memory.

I bought beautiful staff - punched tape reader (Left) and writer (Right)

They uses standard 25mm tape.  Writed has 8-bit mechanism. Reader can eat 8, 7 and 5 bit tapes with two different sizes.

Waiting holidays to tear down and repair. They should work, but need some inspection

I woke up and drew this.

Some comments:

1. Harvard arch - two ferrite core modules. One for program, another - for data. Each one has decade address input.
2. Main dekatron counters - at least, four:
   1. Data counter. From 0 to 255.
   2. Address Pointer counter. From 0 to 10^4 or 10^5
   3. Instruction Pointer counter. From 0 to 10^4 or 10^5 too.
   4. Loop Stack counter. Up to 100 or 1000. For looking up opening instruction of current cycle (as we can have inner loop)
3. Dekatron counters has decade output, so we should use some converter to BIN, or use weak memory filling.
4. For program loading I want to use punch tape. I already have punch tape reader and writer!
5. Want to find old CRT terminal for Console In/Out operations.

My friend found very interesting schema. Wneh we do not use any special counting devices - e.g. neon tiratrons or dekatrons, but counting directly on nixie. Want to try this schema.

It look like as classic schema on tiratrons, but here we have built-in tiratrons in nixie tube. Very interesting and compact... But use diodes... So not acceptable for silicon-free project.

On dekatron bi-directional counter we can do only Load/Store and Increment/Decrement operation I try to understand how can we implement native Brainfuck loops.

In brainfuck language Loops are marked with '[' and ']' instructions. If on executing ']' instruction current data value is not null - we should return to IP after '[' instruction.

Loops can be nested with very deep stack levels. So, let's first add Word-length register and store IP value of last '[' instruction:

If we execute ']' instruction and see, that our stored value is valid and we need to do next loop iteration - we just load this IP.

If we should fall through to the IP after ']', we go there and send invalidating signal to our cache value.

As a result if we need to go to the beginning of outerLoop we should find beginning IP value.

Let's add IpStack Counter. It's max value would be the limitation of max stack level. For example we can count from 0 to 1000 - just need 3 dekatrons, or 10 tiratrons (for tiratron counter).

So each loop end we increment Stack counter, and for loop beginnings - decrement it. And do IP decrement. When IpStack becomes to be zero it means that we found outerLoop beginning. We can load this IP to cache and start performing yet another iteration of the loop.

Source:

https://www.elinux.org/images/1/18/Harwell-ee-1951-txt.pdf