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CALL is just a MOV with swap

A project log for PDP - Processor Design Principles

Distilling my experience and wisdom about the architecture, organisation and design choices of my CPUs

yann-guidon-ygdesYann Guidon / YGDES 02/02/2018 at 15:542 Comments

Speaking about the PC register, there is one typical feature found in the YASEP and the YGREC. This can't be directly applied to other more sophisticated architectures but it's very handy for small ones.

The ALU result bus is swapped with the NPC when executing a CALL instruction. This effectively saves the NPC to the register set and the result goes to PC.

This is a nicely RISCy method because the return address is saved to the register set, and not a "link register" or a stack. This is very flexible so you can have coroutines and all kinds of neat features at almost no price, as long as you manage your stacks manually and correctly.

On the YASEP and YGREC, the return address (NPC) is often saved to a register that maps to memory. All you have to do then is increment/decrement the pointer to create an effective stack.

As a result, the CALL opcode is "just another version of MOV with the swap bit set".

Now, what happens with a CALL to PC ? The NPC is lost because PC is overwritten with the result bus. This is easily detected and can serve as a special type of JUMP (in YGREC, it's the "overlay" instruction).


Among the other notable strategies for dealing with CALL, let's mention the system implemented by TREX, inspired by some FORTH processors. This is pretty radical : every write to PC saves the last PC to the dedicated/implicit LINK register. So there is no distinction between CALL and JUMP for example. But this wastes one register for a fixed function, which might not be suitable to architectures with a small register set...

Discussions

Julian wrote 09/02/2018 at 13:21 point

Related to this, my #C61 design uses the automatic copy to the link register design too, although it does it by arranging for two simultaneous writes (rather then renaming the register as the linked architecture does).

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Yann Guidon / YGDES wrote 09/02/2018 at 13:36 point

#YASEP Yet Another Small Embedded Processor  and #YGREC8  also perform 2 simultaneous writes. It's pretty effective :-)

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