Secure microSD Vault

ITs done sent order away! 4 Layers it is..

Good to go to PCB Fab!

Visible components: NAND Flash, LED, 100MHz oscillator, 2MByte SPI Flash, 2x Murata DCDC, Si1143 ambient light sensor, IR LED and decoupling caps,

The boring side: Xilinx Artix FPGA A50T, 10 pin Connector for 0.6mm IDC, Micro-SD Card edge terminals.

Simple 4 layer PCB, no blind or buried vias.

Googles geophyte RTL passed synthesis, and what is the best it DOES fit into A50T :) so this is GO Green for the implementation. Sure the code could be optimized and or ported to Microblaze but it is nice to know that geophyte code does fit as is.

The most boring work, adding verified and ready for production component libraries. The libraries are all done, just need double check and add some extra infos. This will hopefulle not delay PCB production.

As for google geophyte direct compatibility NAND flash is a must, then special revision is made with NAND flash (replacing the MicroSD connector). The Extension port for this version has 4 I/Os and JTAG pins, 1.8V logic level. There is one LED, as sensor system Si1143 is used with one IR LED.

Geophyte conversion to Vivado is WIP, it seems that linux machine with python >= 2.7 is required to generate the wishbone system. The SD Card part of geophyte did synthesis OK with Vivado 2015.2 funny google guys still use ISE 14.7 !

All routing done! Unrouted length = 0mm.

It seems doable now, the first revision was aiming to support UHS-II also, but this feature was a little bit too much for the given space constraints so it was dropped. After that and some smart placement choices all parts fit in. PCB technology was estimated as 1+4+1 HDi, this stackup:

Simplified stack uses 4 layers standard process.

Unrouted signal, SD Card socket sense line. The rest is routed, there is some cleanup on the power layers to-do also.