One Transistor Latch

I was researching early computer technology and found references to a circuit used by some Japanese systems called the Parametron https://en.wikipedia.org/wiki/Parametron It resembles some of my ideas for this circuit. I had been thinking that the circuit would represent 1 vs. 0 by the phase of an oscillating signal with 180 degrees apart would be the 1 and 0 values.

One advantage of the parametron design was that it was more reliable than early transistors.

Actually this project was already solved in 1973 by my dad!  Patent https://patents.google.com/patent/US3811076 is for a memory chip made from one bit latches containing one FET transistor and 1 capacitor/

I checked the idea of using two capacitors. It doesn't work.

It's hard to get a sample image from my simulation that is easy to explain, but it is not going to work.

This is one possible waveform for voltage on the latch's main capacitor. The idea is that the high (red) and low (blue) values are 180° out of phase from each other.  The power signal provides the concept of phase.

There has to be at least an additional capacitor or inductor to distinguish the state when the two waveforms cross each other.

[I put this in description instead of project log. moving it here]

While brainstorming, I thought of a potential implementation. The signals would oscillations 180 degrees out of phase to represent zero and one instead of yes oscillation/no oscillation.

Another brainstorming idea is to make the power supply oscillate at twice the speed of the data's oscillation. Most probably the polarity of the supply wouldn't go from + to - . Instead it would be offset from zero by a volt or two. For example, Peak to peak might between 1V and 4V.