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A project log for Trinity Core and Net

A 32 Bit Variable Length Instruction Set Core and Transputer Like Comms Network

andre-powellAndre Powell 04/21/2016 at 18:350 Comments

I've now updated the top level so that there is a Master Node and a Slave Node. The Master Node Instruction memory will take an image of one instruction stream and the Slave Node take a different instruction stream. This allows me to create a kind of Job Dispatch algorithm.

While testing this I discovered a couple of issues with respect to the assembler which are now fixed.

The next thing is to update the array so that each node has a Von Neumann Memory. This will allow program code rather than just data to be distributed.

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