My sincere apologies if anyone has been waiting for this. I've had work and personal relations come into play so they past 3 days I've needed to put up my files has been next to nil. Right now I'm remoting into my computers at home to make a simple zip file with the CERN OHL of the Eagle schematic capture and board layout and putting that on my server. It's now available on GitHub.

Edit: I've uploaded a new zip file with the OSH Park-compatible DRU and the DSN file for FreeRouting. From this point on, I'll only maintain the GitHub copies.

Zip file MD5: 1d69958143c7c591f87b919347afbcb8

Now, I know it is atypical to use the CERN OHL and something like CC BY-SA to license these files. Unless I've misunderstood their FAQs and other documentation on the CC site, the CC license cannot be revoked once applied to whatever it's applicable to. That and they state that the CC license is not applicable to hardware or software. This may have been a change since version 3; I do not know. I rather stay current instead of having to rely upon a non-current, thus more-likely-to-be-deprecated license to release my design under.

Anyhow, I know the schematic is a bit of a mess and I will clean it up in the near future, but right now that isn't a priority. I'm a bit behind on my work with this and I need to catch back up. I have a vacation coming up soon that will be utilized for much needed rest and this kind of work too. FYI, the SRAM chip does draw a bit of juice, about 80 mA @ 60 MHz iirc, and there are lower power options available. The only issue is that the address pins are different in the TSOP-44 pinout, but the data and control pins are identical.

I've had that version of the board layout running on an offline copy of freerouting.net's software. Why? Some have raised concern about the usefulness of trace length matching that I implemented on the mainboard and, honestly, I have had my doubts about that since I initially set up those traces back in mid February. It is comforting to just a few days later see a HaD article on just this topic. The display driver for the OLED screens favors a 5 ns rise time and so do the data sheets for the PIC32.  The re-routed board, which will need some tweaking after the optimizer is done, will have straightened everything out and has dropped the summed trace length on the board from ~156 inches to the low 130's. Also, more than 100 vias have been removed. I very much want to test this resulting copy of the board against the existing design with a home made EMI probe, compare ground plane noise, compare signal skew, see if I need series/source termination on the SRAM, et al. Yes, though I'm running the SRAM at 65 MHz initially, I may attempt a full 80 MHz and see if everything continues to hold together and the speed is beneficial.

Once the accidents clear up I'll make my way home and properly post these files up on GitHub.