Ruud van FalierI've done a bit more work on defining the instruction set.
These are the instructions that I'm planning to implement and that should be supported by the architecture that has been worked out so far:
| MOV [A,B,X,Y] [A,B,X,Y] | Copy register n1 to register n2 |
| MVI [A,B,X,Y] #value | Copy immediate value to register n |
| LD [A,B,X,Y] $address | Load register n with value at memory address |
| ST [A,B,X,Y] $address | Store register n value at memory address |
| ADD | A + B → A |
| SUB | A - B → A |
| AND | A & B → A |
| OR | A | B → A |
| XOR | A ⊕ B → A |
| INC | A + 1 → A |
| DEC | A - 1 → A |
| RAL | Rotate all bits in register A to the left |
| RAR | Rotate all bits in register A to the right |
| JMP $address | Jump to memory address |
| JZ $address | Jump to memory address if zero flag is set |
| JNZ $address | Jump to memory address if zero flag is not set |
| JC $address | Jump to memory address if carry flag is set |
| JNC $address | Jump to memory address if carry flag is not set |
| CALL $address | Jump to subroutine at memory address |
| RET | Return from subroutine |
| NOP | Do nothing |
| HLT | Halt execution |
| IN | Load data from input into register A (needs to be worked out) |
| OUT | Output data from register A (needs to be worked out) |
I haven't given much thought to input & output yet, so I might need a few specialized instructions in the future to cover that part.
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Is this RISC architecture?
Are you sure? yes | no