Whats New?

• Coded a second ROM page.
• The monitor code spans both ROM pages.
• The monitor is both hardware and emulator friendly (i.e. delay rountine added).
• An "Address to Page" decoder routine has been added.
• The Interpreter has been coded but not currently in use.
• The counting demo with delay is machine code.

Version 4

• The Emulater assumes read/write of registers (assumes PCBs will be reworded to suit).
• A bit of a re-organisation the Monitor code.
• Update Reset code.
• Add all the ROM and RAM pages.
• Add code to the Monitor to change RAM pages (uses PAGE PTR), until PCB boards have been updated for register read/write.
• Coded the Interpreter and some support subroutines (ROM PAGE 2).
• Add PP (Page Pointer) to keep track of the Interpreted Page.
• The Interpreter still to be tested.

The Emulater itself is now pretty complete.

AlanX