TS50 True Sine Inverter

Included here are a few wave forms of the TS50's AC output.

First up is the output at no load.  Channel assignments:

• CH1=current, 100mV/A
• CH3=voltage
• M1=FFT current
• M2=FFT voltage

Same setup but with 40W load (incandescent bulb).

In both the harmonics are concentrated below 150Hz and, the three higher harmonics are likely aliases.  The FFTs I've taken of the utility power in my home have more harmonics than this.  Per the log covering the sine module's operatin, the reason that the FFT is not square is because the frequency isn't exactly 60Hz.

Last one shows a higher power inductive load.  CH1=current (185mV/A), CH3=voltage.  The TS50 is powering a Dremel 3000 with the speed control at position 6 (out of 8) under no load.

Visually estimating phase shift, peak current is ~ 1.2A which roughly equates to 192W peak and 64W RMS.  The distortion in the voltage waveform is due to the relatively high impedance of the inverter and not the sine generation / output method itself.  It's a good demonstration that regardless of an inverter's continuously rated output it must have a substantially higher peak output capability.

Otherwise, the current waveform & phase shift match what was observed with the Dremel powered by the utility.

The sine bridge section is a specific implementation of direct digital synthesis (DDS).  Theory first, then some details on the unit.

A sine wave, or any time varying signal, can be represented by a set of discrete voltages representing the signal's amplitude at specific points in time.  The more discrete voltages representing the signal over a given time interval, the higher the resolution.

At its core this is what the sine bridge does.  It uses a controller (MCU) with a fixed table representing the sine wave's amplitude at specific time points.  The controller 'plays' each of these values at a fixed frequency through an LC filter to obtain a fairly distortion free sine wave.

The sine bridge achieves this through the use of a full [H] bridge and LC filter like that used in a flyback power supply.  In fact, some of its design & operation is very similar to a flyback.

The controller contains a table with one hundred values.  Each of these represents the voltage of the sine wave at a particular angle.  It was previously mentioned that the values are related to time, which in this case is equivalent to angle because the unit is producing a sine wave at a single frequency.

The MCU accomplishes this by the frequency used to 'play back' the values.  The frequency must be evenly divisible into the fundamental (output) frequency or it will be off and contain harmonics.

It was also previously mentioned that the sine unit functions similar to a flyback converter.  More specifically, it functions like a flyback converter with the output inductor operating in continuous mode (this makes the math a bit easier).  Neglecting losses, the output voltage of a flyback operating in continuous mode is determined by the formula Vin * D = Vout where D represents the on-time, or duty cycle, of the PWM period.  So the table of values contained in the MCU are actually the on-times with which to vary a PWM's duty cycle.

Bringing it all together.  The MCU uses a PWM to drive a full bridge at 24kHz.  At this frequency, exactly 400 periods will occur in the time required for a single 60Hz cycle (16.666667mS).  The MCU's table contains one hundred entries representing on-time (D) values for sine angles between 0 and 90 degrees.  Starting a 0, the MCU loads the first value to the PWM and starts the bridge.  During that period the second value in the table is loaded (it latches to the PWM at the start of next cycle).

This process repeats until the end of the table is reached - 90 degrees.  The MCU then repeats the process in reverse, counting down from 90 - 0.  At this point half of a sine wave has been produced.  To complete the remaining half the MCU reverses the bridge direction and repeats the entire process.  Again at 360 degrees the MCU reverses the bridge and continues.

Throughout this process the output of the bridge passes through LC filter to perform the voltage averaging function and presents a clean 60Hz sine wave.

The PWM and bridge control are mostly handled in the MCU's hardware but, the loading of the table is handled in firmware and is time critical.  For this reason it's handled by a non-maskable interrupt handler.  This, along with some other characteristics of MCUs, presents considerations & limitations for this approach:

• Sine wave resolution is dictated by table size which in turn is dictated by the MCU's processor speed.  The MCU must have sufficient execution margin to load the table and still perform other tasks (temperature monitoring, communication, etc.).
• The table size should meet the Nyquist criteria.  The TS50 violates it (should be 200) but with a single frequency/waveform the LC filter masks most of it.
• Even with the correct frequency set to drive the PWM there will be harmonics in the output.  This is because of the inherent drift & jitter present in the on-board clock oscillators of most MCUs.  Practically speaking this isn't a big deal unless your building a grid-tied inverter or are powering devices that derive timekeeping from the AC line.  The oscillator's tolerance translates to +/- 1Hz of drift.
• A larger table results in a smaller output inductor (more on this later).

All of these can be overcome in the design without extraordinary effort.  The TS50's sine module uses an 8-bit MCU running at a 6MHz instruction speed.  The workbook attached to this project contains the model and table values for the TS50.  The pwmtable tab contains the calculations for each table entry along with a graph.  Very instructive to see how changing values effects the signal.

Implementation details.  Electrically a bit more is happening.  The full bridge doesn't quite function like a conventional one.  It has two distinct modes of operation:  charge and flyback, and each occur during a period (cycle).

Charge mode occurs during the PWM on-time, or D, and is like that of a conventional bridge.  Current flows through the high-side MOSFET, from the HV supply, through the output inductor & load, and finally through the opposing low-side MOSFET returning to the supply.  This mode is referred to as charging because, like a flyback, the inductor is also charging (storing energy in its core).

Flyback mode occurs when the PWM's duty cycle is complete.  The high-side switch is now off but the opposing low-side remains on.  Additionally, the same-side low turns on to support the flyback action of the inductor.  The inductor, having reversed polarity, maintains the flow of current in a loop through the load, through the low-side MOSFETS & ground plane, and back to the inductor.

This process will repeat each period through 180 degrees of sine and then repeat with the MCU maintaining the opposite low-side switch on for the duration.  Current flow & switch is opposite the diagrams but electrically the operation is identical.  This control is implemented in the MCU through a combination of peripherals and firmware.

The remainder of the sine module's design is unremarkable with the exception of the output inductor (L1).  A good starting point is to design as a continuous buck.  Calculate the required inductance first:

                                   L = (Vout * T * (1 - Dmin)) / (2 * Iomin)

• L = inductance
• Vout = maximum output voltage, 170V for 120 VAC RMS
• T = bridge period in seconds (41.66uS for 24kHz)
• Dmin = minimum duty cycle in %
• Iomin = minimum output current

You can get some crazy numbers depending on what you plug in for Dmin and Iomin.  Dmin is changing every period and putting in 0 (which the 1st few cycles in the pattern will be) will over-size the inductor.  0.05 (5%) is a good place to start. 

Iomin actually represents the critical inductor current, or the current below which the inductor becomes discontinuous (i.e. completely discharged).  This is the parameter to pay the most attention to and assuming T & Vout are fixed, will most affect the design.  It's suggested to start with Iomin at the mid-point of the design's current rating (e.g. for an inverter rated at 1A RMS start with 0.5).

A word of caution:  don't think that bigger is better.  A large inductance value will require a large core with a large number of turns and high dissipation.  If the value is too high it will distort the sine wave (cut-off frequency is too low).

This can be easily seen if the approach to the inductor's design is that of a second order (2-pole) filter:  (ζ / ω) * 2 * R where R is the load in ohms.  As load increase (R decreases) the required inductance goes down.

Once the inductance is established the core type & material can be selected and the design completed for wire selection & turns, temperature rise, core, and copper losses.

With L1 established the value for C1 can be calculated:  1 / (L * ω^2).  Values should be in the 1 - 6 uF range.  Be sure to select one with suitable margin for voltage ratings.  The capacitor will see the full DC voltage of the bridge along with the AC component.

Below are pics of the top & bottom of the sine module as implemented in the TS50.  The one modification was to grind off the 'leg' traces on the bottom of the board:  that was a layout error and resulted in a current loop generating EMI.

The DC transformer section started life as an R&D platform (named inv48) for transformer design.  Hence, it's very simple and beyond current limiting doesn't incorporate features to protect it from or manage its environment (e.g. no thermal management, regulation of auxiliary supply, etc.).

It's unique feature is the use of a Bluetooth module to provide a primitive console that was used for control & data acquisition.  Through the use of a terminal emulator on a PC the unit can be start/stopped, operating parameters viewed & changed, etc.  Added benefits are galvanic isolation - very beneficial when working with high voltages - and no cable fuss.

This section shares a common lineage with the buck:  both use the PIC16F1769 MCU, gate drive & switching MOSFETs, auxiliary supply scheme, and some firmware.  Pulse-pulse current limiting is provided by low side current sense resistors on each leg of the bridge.

The bridge is a conventional H configuration using MOSFET transistors and bootstrap-based high side gate drives.  The original design included an output LC filter and opto-isolator based feedback for the voltage control loop.  The transformer primary used a single winding and the secondary a center-tap for full wave rectification.

Eventually work began on the digital sine evaluator and a high voltage DC source was needed to power it.  Inv48 was adapted for this purpose.  The output LC filter and control loop were removed,  a new transformer (TDK/EPCOS RM10 core, N41 ferrite) was built with a single winding secondary that produced ~ 160V with 12V DC on the primary, and updates to the firmware.  This set the stage for its final transformation.

As used in the TS50 project, inv48 functions as a glorified DC transformer.  It operates at a fixed frequency of 50kHz and fixed duty cycle of 95% for each side of the bridge.  In addition to the previously mentioned modifications, the opto-isolator was repurposed to issue a logic 'turn-on' command to the sine section once the DC transformer was running.

To be of some value in the real world, the current sense needed some adjustment since the original design was for peak currents under 10A.  The TS50 supports 50W RMS loads, no problem.  But even a silly 40W incandescent bulb could generate primary currents in excess of 60A!  Note that the steady state current is ~ 333mA RMS.

Here's the math:  the cold resistance of a 40W bulb @ 25C is ~ 25Ω.  120VAC RMS / 25 = 4.8A.  Reflected back to the primary of the DC transformer, with a ratio of 14:1, 4.8 * 14 = 67.2A.  The instantaneous currents could be even higher depending on where the sine voltage waveform is at the instant of turn-on (the peak of the sine wave @ 120V RMS is 170V).

In practice, the primary doesn't see currents that high because the bulk capacitance on the HV supply sources it and it's of a duration measured in microseconds since the bulb's filament resistance increases rapidly (the impedance in the sine section's output inductor also limits instantaneous current).  It is still, however, high:  I've measured peaks exceeding 1.5A.  So again, reflected to the primary 1.5 * 14 = 21A.

This peak demand will persist for several milliseconds, longer than the bulk capacitance on the primary can support, so the DC transformer must be able to support this for short durations (on the order of a few seconds).

The MOSFETs used in the bridge are capable of handling 60A ~ 100uS.  The PCB is only 1 oz CU but for short durations not a concern, plus traces & ground planes are generous so that parasitic inductance doesn't cause glitches.  The current sense resistors where changed to 10mΩ and higher power ratings to handle the peak & RMS currents.

The firmware was further modified for automated start (vs. requiring console input), input under & over-voltage limits, logic control of the sine section, and improved current limiting.  Per the above's discussion, the current limit was set at 18A.

Current limiting employs an inner & outer control loop.  The inner loop is hardware based (configured in firmware) and limits current pulse-pulse.  The outer loop is a simple PI loop that shuts the bridge down if the condition persists.  Clearing the condition requires console intervention or a power cycle.

Pictures of the original unmodified unit:

The buck regulator is an adaptation of my synchronous buck project posted here: 125vbuck.  That design provided 25 watts at 5 VDC.  It's capable of handling more power (I've tested to 100W), transient response is good, and it can function as an LDO (Low Dropout Regulator) - necessary to support the boost stage of the inverter.

Modifications:

• Removed the output Solid State Relay (SSR) - not necessary and reduces conduction losses.
• Removed PCB fuse F1.  Replaced with a thermal user push-to-reset 7A fuse mounted in the enclosure.
• Added 4000uF of bulk capacitance to the output.  This aids transient response and supplies the current necessary to respond to the inrush currents of user AC equipment.
• Adjusted the voltage divider for the control loop.
• Modified the control loop RC network.  Changed from type 3 to type 2 filter given the addition of higher ESR filter caps.
• Modified the MCU control program to support the higher output voltage and current.

The low losses in the power & output section, along with the control program, allow it to function as an LDO.  It's actually configured for a 13V regulated output and can hold this with an input of about 13.5V, depending on load.  Below this the output will track the input with a maximum 1V drop.j

The MCU will enter under-volt lockout (UVLO) around 11V by shutting down the regulator.  This turns the bridge & sine sections, and hence the AC output off.  The MCU will hold the unit in UVLO until 12V which allows for battery recharge in the PV system.

The regulator can maintain its regulated output with input voltages up to 20V.  Above this the MCU shuts down the regulator and enters over-volt lockout (OVLO).  This is necessary to protect the gate driver & 5V logic regulator.  Beyond the MCU shutdown there's no circuitry to disconnect the input so higher voltages will damage it.