The first problem I had whil working on the CPU board is that I locked out my self. I should have added an erase button. Which was easily made good for with some hot glue.
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A project log for FBus: Open FPGA Realtime Bus
Defining and implementing a bus protocol that is built around low-cost FPGAs to enable modular and affordable control and DAQ systems.
The first problem I had whil working on the CPU board is that I locked out my self. I should have added an erase button. Which was easily made good for with some hot glue.
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