pvb.xlsx

Design workbook for balancer & charger.

sheet - 326.89 kB - 06/10/2022 at 21:00

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pvbb-210518.zip

KiCad 5.x balancer project (final).

Zip Archive - 1.64 MB - 06/10/2022 at 20:31

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pvbcb-210218.zip

Kicad 5.x back-plane project (final).

Zip Archive - 226.76 kB - 06/10/2022 at 20:31

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pvbcs-210603.zip

Kicad 5.x SEPIC card project (final).

Zip Archive - 93.83 kB - 06/10/2022 at 20:31

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pvb-firmware-support.zip

Firmware support files for Balancer & Charger projects. Place in a folder used for includes across all projects and add path to project properties.

Zip Archive - 2.14 kB - 05/23/2022 at 17:42

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pvbb-210518-fw-v2_0.X.zip

Balancer firmware (final).

Zip Archive - 554.30 kB - 05/23/2022 at 17:39

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pvbc-210218-fw-v3_0.X.zip

Charger firmware (final).

Zip Archive - 631.11 kB - 05/23/2022 at 17:39

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pvb-common.X.zip

Project files common to Balancer & Charger firmware.

Zip Archive - 6.44 kB - 05/23/2022 at 17:39

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chgbal-48v-charger-sepic_continuous-250w-150khz-58u-transient-hs_ct.asc

Final LTspice model used to validate the prototype 200713.

plain - 7.25 kB - 09/01/2020 at 16:41

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sp-kicad-200713.zip

SEPIC prototype PCB project in Kicad.

Zip Archive - 401.56 kB - 08/29/2020 at 03:45

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sp-mplab-200713.x.zip

SEPIC prototype firmware.

Zip Archive - 486.77 kB - 08/29/2020 at 03:44

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chg-sepic-prototype-150khz-200713.xlsx

SEPIC prototype design workbook.

sheet - 94.38 kB - 08/29/2020 at 03:42

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chgbal-48v-charger-sepic_continuous-250w-150khz-ind-rm12-58u-r1.pdf

Titan analysis of coupled inductor design for 150kHz prototype evaluation.

Adobe Portable Document Format - 66.66 kB - 07/13/2020 at 23:07

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chgbal-48v-charger-sepic_continuous-250w-150khz-58u-transient.asc

Updated LTspice model with peak current limiting, C_ac/L_l resonance, and snubber.

plain - 7.21 kB - 07/13/2020 at 22:54

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chg-sepic-prototype-150khz-cc_snub.xlsx

Completed design workbook for prototype build evaluation.

sheet - 75.25 kB - 07/13/2020 at 22:53

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chg-sepic-prototype.xlsx

Prototype design workbook.

sheet - 21.75 kB - 03/09/2020 at 01:25

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chgbal-48v-charger-fb_interleave_2-100khz.asc

LTspice model of full bridge current fed converter.

plain - 3.31 kB - 01/06/2020 at 02:19

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chgbal-48v-charger-sepic_continuous-interleave_rearranged-100khz.asc

LTspice model of SEPIC interleave converter.

plain - 3.52 kB - 01/06/2020 at 02:18

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fb-vsense.zip

MPLab project of source for flyback measurement acquisition testing. Requires terminal emulator with TTL level RS232 interface.

Zip Archive - 427.17 kB - 12/04/2019 at 19:44

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chgbal-48v-flyback-opamp_drv.asc

LTspice simulation of constant on-time SR latch drive using op-amps.

plain - 4.70 kB - 12/04/2019 at 19:30

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chgbal-48v-la-flyback.asc

LTspice simulation of flyback measurement scheme.

plain - 3.88 kB - 12/04/2019 at 19:29

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chgbal-48v-la-flyback-pic.xlsx

Worksheet with PIC measurement data, coefficient, and accuracy calculations.

sheet - 10.23 kB - 12/04/2019 at 19:27

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