Reading old logs, I rediscovered 1. Notes on using a pipelined ALU for frequency division and it appears that I could build a discrete PEAC16×2 using a pair of circuits I have somewhere in stock.

These adders could work in parallel, with a fixed configuration, and though I doubt they could run at the advertised 40MHz, it's fast enough to implement the scrambler of #Not an Ethernet Transceiver.

I just need to find where I have stored the chips...

Of course a FPGA will be faster and more practical but I know some people still prefer discretes and MSI :-D