I know those vias are likely going to fracture the vision of my 17.5mm square ideal, so I thought I'd just get started.

From what I understand, I could go as low as a 0.05mm thick via, but I thought that a good size would be 0.2mm inner : 0.4mm outer. I also looked at JLCPCBs other capabilities and thought "hmm nah, don't chance it) and set all distances to 0.2mm. I've believed that 0.2mm track/spacing is the aim for fabrication that I'm going to persue for #SecSavr Soapavr [gd0146] anyway.

Then I've got to look at these to figure out about the Via spacings:

From this, it kinda seems that I shoud have the same-signal via at 0.1mm (which would be 0.3mm total if measured like JLCPCB) and just have 0.2mm for different signals like everything else.

Now, I was saying that I wanted a 0.4mm diameter via, but it seemed like anything smaller than 0.55mm (Fusion's default smallest) was the exact same size.

this was the setting that I had to change. I think "Pads" in this case refers to through-hole pads, which I don't have on this design.

Now I've got a via that actually looks like 0.4mm.

I had a feeling I was going to have at least one pad that generated to close.

Anyway, back to mentally routing traces before I start drawing some that I'd likely have to wrip up later.

I've already determined the pinouts in the top right corner. I still want to expose IO0 somehow and so I've put it on the extra EXP pin.