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BoxLambda

A retro-style FPGA-based microcomputer. The microcomputer serves as a platform for software and RTL experimentation.

epsilonEpsilon
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BoxLambda is an open-source project with the goal of creating a retro-style FPGA-based microcomputer. The microcomputer serves as a platform for software and RTL experimentation.

BoxLambda is a software-hardware cross-over project. The plan is to provide room for experimentation both on the FPGA RTL side and on the software side.

# About BoxLambda

**BoxLambda** is a project that creates a retro-style FPGA-based microcomputer from open-source components. The microcomputer serves as a platform for both software and RTL experimentation.

BoxLambda is a software-hardware crossover project, providing opportunities for experimentation on both the FPGA RTL side and the software side.

## Key Goals

- Create a sandbox for experimenting with software and FPGA gateware:
    - It should be **easy** to jump in and do something: create, hack, tinker.
        - **Simple Enough for One Person**: A motivated individual can develop a solid understanding of the entire system, including both software and hardware.
        - **Deterministic Behavior**: The duration of operations such as internal memory or register access must be predictable by design.
        - **Self-Contained Run-Time Environment** supporting high-level interactive and low-level systems programming.
    - Create a **Modular Architecture** allowing for a mix-and-match of software and hardware components. Optionally, support Partial FPGA Reconfiguration.
  
- Target Hardware: Digilent's [Arty-A7](https://digilent.com/reference/programmable-logic/arty-a7/start).
  
- The computer supports the following peripherals:
    - USB HID Keyboard
    - USB HID Mouse (optional)
    - USB HID Joystick (optional)
    - Real-Time Clock and Calendar (optional)
    - Serial port
    - SD card storage
    - Flash Memory storage
    - VGA Display
    - Audio output
  
- Sound and graphics support retro-style 2D demos and gameplay.

## Status (Dec. 2024)

- **Infrastructure** (build system, etc.): Complete, with room for simplification.
- **Gateware**: Complete as pictured in the Block Diagram. Of course, there’s always room for additional or alternate components.
- **Software**: Early stage development.

## GitHub

- **Source Code**: [https://github.com/epsilon537/boxlambda/](https://github.com/epsilon537/boxlambda/)
- **Project Blog**: [https://epsilon537.github.io/boxlambda/](https://epsilon537.github.io/boxlambda/)
- **Project Documentation**: [https://boxlambda.readthedocs.io/en/latest/](https://boxlambda.readthedocs.io/en/latest/)

  • v0.1.0: RegMap and Bootloader

    Epsilon • 07/08/2025 at 11:39 • 0 comments

    ## Label `v0.1.0`: Changes sinces label `boxlambda_simplified` - 2025-07-07

    ### Added

    - Corsair-based register map definition and documentation.
    - Software component `sdspi`.
    - Enabled HW flow control support in the UART core.
    - Bootloader as default IMEM image initializes SDRAM and loads application image from flash into IMEM.
    - A "make sw" target to build all the software projects without building any
    gateware projects.

    ### Fixed
    - Fixed bug in Ibex Single Instruction Prefetcher related to handling of multiple
    near-simultaneous interrupts.

    ### Changed
    - Triggering code (re)generation when (re)generating build tree, or when
    explicitly requested using `make cgen` command. No longer triggering code
    (re)generation as part of the regular build process.
    - Renamed build targetr `gw_codegen` to `cgen`.
    - Set default baudrate of UART core to 115200.
    - Rewrote Ibex Single Instruction Prefetcher as an FSM.
    - Simplified UART and GPIO APIs. The API no longer requires a uart/gpio object.
    - Migrated from .c to .cpp.
    - Migrated from unsigned to uint32_t/uint8_t.
    - Centralized all memory map #defines into memmap.h.
    - Put IMEM size in linker script again instead of passing it in via build system. For simplicity's sake.

    ### Removed
    - Removed ad-hoc register map definitions. Replaced with Corsair-generated register map.
    - Removed *_flsh software build variant. The bootloader now loads the application image from flash into IMEM.
    - Remove arty-a7-35 from Bender.yml files.

  • Minimizing Interrupt Latency and Jitter.

    Epsilon • 05/06/2025 at 11:17 • 0 comments

    https://epsilon537.github.io/boxlambda/minimizing-interrupt-latency-and-jitter/

  • BoxLambda Simplified

    Epsilon • 04/22/2025 at 12:33 • 0 comments

    https://epsilon537.github.io/boxlambda/boxlambda-simplified/…

  • The Latency Shakeup

    Epsilon • 03/18/2025 at 22:23 • 0 comments

    https://epsilon537.github.io/boxlambda/latency-shakeup/

  • BoxLambda Base

    Epsilon • 01/11/2025 at 10:08 • 0 comments

    ## Label `boxlambda_base`: Changes Since Label `dfx` - 2025-01-07

    ### Added

    - Support for multiple reconfigurable partitions in the build system.
    - Mechanism to acknowledge accesses to invalid addresses and non-responsive slaves, returning a `0xDEADBEEF` data pattern. This feature is enabled in project builds (`boxlambda_base`, `boxlambda_dfx`) and disabled in test builds.
    - Invalid Addressing Test Case.
    - Second bus master port added to Reconfigurable Partition `VS0`, enabling `VS0` to support a CPU with Harvard Architecture.
    - DFX documentation.
    - "Official" BoxLambda Project build `boxlambda_base`, which does not support DFX.
    - "Official" BoxLambda Project build `boxlambda_dfx`, which supports DFX.
    - Gateware build flags: `VS0`, `DFX`, and `ACK_INVALID_ADDR`.
    - Two build variants introduced for all software builds: `<sw_project>_ram` (RAM image) and `<sw_project>_flsh` (Flash Memory image).
    - `dfx_load_rm()` helper function in `dfx_controller_hal` for loading a reconfigurable module from memory into Virtual Socket 0 (`VS0`).

    ### Fixed

    - Verilator script fails if VERILATOR_CPP_FLAGS not set in Makefile.
    - Build trees not clean after running boxlambda_setup.sh.

    ### Changed

    - Renamed IRQ ID and handler for `VS_1` to `VERA`.
    - Renamed directory `gw/projects/boxlambda_top/` to `gw/projects/boxlambda_base/`.
    - Renamed CMake function `link_and_create_mem_file` to `link_and_create_image`.
    - In gw CMakeLists, replaced VERILATOR_CPP_FLAGS and VERILATOR_LD_FLAGS parameters with a single VERILATOR_FLAGS multi value parameter. 
    - Instead of relying on a VIVADO_FLAGS environment variable, vivado is now invoked through a wrapper script: *scripts/vivado_wrapper.sh*. The script defines the vivado flags to use.
    - Moved all verilator build artifacts except the *Vmodel* executable to a *verilator/* subdirectory of the gw project build directory.

    ### Removed

    - Placeholder IRQ ID and handler for `VS_2`.
    - ICAP IRQ handler.
    - Deprecated support for the Arty-A7-35T platform.
    - Ncurses dependency.

  • Dynamically Loading a CPU in BoxLambda.

    Epsilon • 11/17/2024 at 12:24 • 0 comments

    https://epsilon537.github.io/boxlambda/dfx/

  • Keeping Time: RTCC and I2C.

    Epsilon • 08/17/2024 at 08:46 • 0 comments

    https://epsilon537.github.io/boxlambda/i2c-and-rtcc/

  • Hardware and Timer Interrupts.

    Epsilon • 08/17/2024 at 08:46 • 0 comments

    https://epsilon537.github.io/boxlambda/interrupts/

  • SPI Flash Access, Boot, and Core.

    Epsilon • 05/23/2024 at 09:54 • 0 comments

    https://epsilon537.github.io/boxlambda/spi-flash/

  • On USB HID, Keyboard LEDs, and device emulation.

    Epsilon • 03/12/2024 at 16:37 • 0 comments

    https://epsilon537.github.io/boxlambda/usb-hid/

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