Epsilon-
BoxLambda Base
01/11/2025 at 10:08 • 0 comments## Label `boxlambda_base`: Changes Since Label `dfx` - 2025-01-07
### Added
- Support for multiple reconfigurable partitions in the build system.
- Mechanism to acknowledge accesses to invalid addresses and non-responsive slaves, returning a `0xDEADBEEF` data pattern. This feature is enabled in project builds (`boxlambda_base`, `boxlambda_dfx`) and disabled in test builds.
- Invalid Addressing Test Case.
- Second bus master port added to Reconfigurable Partition `VS0`, enabling `VS0` to support a CPU with Harvard Architecture.
- DFX documentation.
- "Official" BoxLambda Project build `boxlambda_base`, which does not support DFX.
- "Official" BoxLambda Project build `boxlambda_dfx`, which supports DFX.
- Gateware build flags: `VS0`, `DFX`, and `ACK_INVALID_ADDR`.
- Two build variants introduced for all software builds: `<sw_project>_ram` (RAM image) and `<sw_project>_flsh` (Flash Memory image).
- `dfx_load_rm()` helper function in `dfx_controller_hal` for loading a reconfigurable module from memory into Virtual Socket 0 (`VS0`).### Fixed
- Verilator script fails if VERILATOR_CPP_FLAGS not set in Makefile.
- Build trees not clean after running boxlambda_setup.sh.### Changed
- Renamed IRQ ID and handler for `VS_1` to `VERA`.
- Renamed directory `gw/projects/boxlambda_top/` to `gw/projects/boxlambda_base/`.
- Renamed CMake function `link_and_create_mem_file` to `link_and_create_image`.
- In gw CMakeLists, replaced VERILATOR_CPP_FLAGS and VERILATOR_LD_FLAGS parameters with a single VERILATOR_FLAGS multi value parameter.
- Instead of relying on a VIVADO_FLAGS environment variable, vivado is now invoked through a wrapper script: *scripts/vivado_wrapper.sh*. The script defines the vivado flags to use.
- Moved all verilator build artifacts except the *Vmodel* executable to a *verilator/* subdirectory of the gw project build directory.### Removed
- Placeholder IRQ ID and handler for `VS_2`.
- ICAP IRQ handler.
- Deprecated support for the Arty-A7-35T platform.
- Ncurses dependency. -
Dynamically Loading a CPU in BoxLambda.
11/17/2024 at 12:24 • 0 comments -
Keeping Time: RTCC and I2C.
08/17/2024 at 08:46 • 0 comments -
Hardware and Timer Interrupts.
08/17/2024 at 08:46 • 0 comments -
SPI Flash Access, Boot, and Core.
05/23/2024 at 09:54 • 0 comments -
On USB HID, Keyboard LEDs, and device emulation.
03/12/2024 at 16:37 • 0 comments -
The Interconnect, Harvard Architecture, and Dual Port RAM.
01/06/2024 at 12:09 • 0 comments -
An attempt at a PicoRV32-based Soft DMA Controller - Optimizations.
11/14/2023 at 12:00 • 0 comments -
An attempt at a PicoRV32-based Soft DMA Controller.
10/21/2023 at 08:40 • 0 comments -
Chiptunes! A Dual YM2149 PSG Audio core for BoxLambda.
08/19/2023 at 11:49 • 0 comments
BoxLambda
A retro-style FPGA-based microcomputer. The microcomputer serves as a platform for software and RTL experimentation.