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DSKY

A project log for Apollo Guidance Computer

A running hardware implementation of the AGC, block II using TTL chips.

wglasfordwglasford 07/06/2022 at 23:310 Comments

The DSKY is a separate physical piece of hardware with a simple interface consisting of the 15-bit channel bus and a handful of control signals.  I built this as a stand-alone piece that started out as two boards and then grew to three boards.  I have tried two different implementations and have finally settled on a third implementation.  This has been slow going as during the pandemic I have been stymied with a shortage of certain chips.  I first tried using only simple TTL chips and it got a bit too complex.  I then discovered an LED driver chip and decided to go with those.  I purchased three of these chips and discovered I needed a fourth and I have been waiting for 6 months for availability to complete this sub-system.

I test this sub-system with a Raspberry Pi driving the data lines.  Here is picture of that setup.

As soon as I get the remaining chips I need I will complete this sub-system.  In the mean time I made a paper model of the DSKY and that sent me down the path of building a better looking model of the DSKY.  See my DSKY Model project for the progress on that DSKY.  Both DSKYs are designed to connect to the AGC.

Here are some of the design notes that will help understand the schematics.  

Keyboard: This module implements 19 switches. These switches are converted into a keyboard code using gate logic that is stored in the Channel 15 register. The keyboard codes, their meaning are defined in the following table.

KeyABCDEID
1000011
2000102
3000113
4001004
5001015
6001106
7001117
8010008
9010019
0100000
Verb10001a
Reset10010b
Key Rel11001c
"+"11010d
"-"11011e
Enter11100f
Clear11110g
Noun11111h

The keys are pushbuttons that are normally high. A keypress presents a zero to the logic equations. Negative logic presents the easiest solution. All the lines of interest are normally 1. The logic for each of the five code bits is looking for a key to go low. The logic equations utilize 3 and 4 input NAND gates along with 2 and 3 input NOR gates. The results is NOTed. The equations are as follows.

A = (a * b * c * d) + (e * 0) + (f * g * h)
B = (8 * 9 * c * d) + e + (f * g * h)
C = (4 * 5 * 6 * 7) + (f * g * h)
D = (2 * 3 * 6 * 7) + (b * d * e * g) + h
E = (1 * 3 * 5 * 7) + (9 * a * c * e) + h

Notice that some of the portions of the equations are the same. For instance, A, B and C both have the (f * g * h) portion.

Display: The Display module implements the Channel 10 and 11 registers. Channel 10 is used to write data to the 7-segment LEDs two LEDs at a time. Channel 11 is used to light various indicators. Eight indicator are controlled using Channel 11. Another eight are controlled using Channel 10 with a specific relay word.

It should be noted that all the miscellaneous timing pulses using 555 chips are set up as astable multi-vibrators.

Most of the display logic decodes the Channel 10 value which is used to drive the 7-segment displays as pairs of numbers. Each output to this register drives two 7-segment numbers along with the plus/minus signs and a few other indicators. The format of the register is bits 1-5 hold a low digit value (DSPL), bits 6-10 hold a high digit value (DSPH), bit 11 indicates the plus/minus sign (DSPC) and bits 12-15 contain the relay word (RLYWD).

RRRRSHHHHHLLLLL

According to Ron's website, it is unclear how to blank the sign LEDs. There is one that says light the “+” sign and one that says light the “-” sign. Ron chose to display a blank if both values are zero. There is also the case where both may be set. I am not sure if this is avoided in code, but I have decided to handle this as a blank the sign case. The following table shows the possible states and the results.

(+) State(-) StatePlusMinus
0000
0101
1010
1100

The relay words and the digits each one drives is listed below.

RLYWD#DSPCDSPHDSPL
101111n/aMD1MD2
101010FlashVD1VD2
10019n/aND1ND2
10008UPACTn/aR1D1
01117+R1SR1D2R1D3
01106-R1SR1D4R1D5
01015+R2SR2D1R2D2
01004-R2SR2D3R2D4
00113n/aR2D5R3D1
00102+R3SR3D2R3D3
00011-R3SR3D4R3D5
00000(inactive state)
110012Lights variousindicator lights

The 7-segment LEDs and their names are laid out as follows on the DSKY.

......
MD1MD2
VD1VD2ND1ND2
R1SR1D1R1D2R1D3R1D4R1D5
R2SR2D1R2D2R2D3R2D4R2D5
R3SR3D1R3D2R3D3R3D4R3D5

A decoder is required to convert from the 5-bit AGC code to a 4-bit hexadecimal number (BCD) that is understood by the BCD to 7-segment decode chips. The following table shows the two formats side-by-side.

NumAGCHex
0101010000
1000110001
2110010010
3110110011
4011110100
5111100101
6111000110
7100110111
8111011000
9111111001

The two AGC values need to be decoded side by side, therefore the same logic is repeated twice. This logic uses four 3-8 bit decoder chips with values grouped based on the two high order bits. The outputs are individual lines that represent a numeric value in the table. These are then used as inputs to a pair of 8-3 bit encoder chips to get the required values in hex. The following table shows the table reordered based on the AGC bit values.

The two high order bits of the AGC value designate the chip number (1-4). The three low order bits are fed in as the value to decode. Each output line is given a designation based on the expected output hex value (L1-L15). These values are then fed into one of two encoder chips. One chip generates the values with the high order bit of zero and the other with a value of one. The logic of both chips is negative logic. The “active low” output line from the 74138 chips (Y0-Y7) are fed into the “active low” input lines of the 74148 chips (I0-I7). The resulting hex value is a combination of which chip is being used followed by the 3 digit value.

NumAGC138 Chip#138 OutputBus#148 Chip#148 InputHex
' '000000Y0L151I71111
1000110Y3L10I10001
4011111Y7L40I40100
7100112Y3L70I70111
0101012Y5L00I00000
2110013Y1L20I20010
3110113Y3L30I30011
6111003Y4L60I60110
8111013Y5L81I01000
5111103Y6L50I50101
9111113Y7L91I11001

Now that the data is decoded, each of the value pairs are stored in an 8-bit register. There are 11 registers to store the 21 values. To display the values, a timing pulse is generated that loops through the registers one at a time, feeding the values into 4 LED driver chips. I originally tried to squeeze the logic into three random access ICM7228 chips. The logic proved too complex. Upon reflection, I decided it would be much easier to use the natural address values of the relay words which would require a fourth chip. During the pandemic these chips fell into the category of “out of stock and no estimate of availability”. The only chips that were available were older, obsolete serial access ICM7218 chips. The downside of these serial chips is that the display digit values need to be stored external to the chip. This is because each time a value changes, all the values need to be re-written serially.

The digit enable numbers and their chip assignments are shown in the table below. Note that some addresses are not used, but are required given the serial nature of the chips. Also note that the values need to go into the chip in reverse. The DE column shows the reverse numbering, i.e. the numbering from the Display Control 154 chip.

RLYWDDigitChip #Enable #DE
0n/a2287
0n/a1187
1R3D52276
1R3D41176
2R3D32265
2R3D21165
3R3D12254
3R2D51154
4R2D42243
4R2D31143
5R2D22232
5R2D11132
6R1D52221
6R1D41121
7R1D32210
7R1D21110
8R1D144815
8n/a33815
9Noun244714
9Noun133714
10Verb244613
10Verb133613
11Prog244512
11Prog133512
12n/a44411
12n/a33411
13n/a44310
13n/a33310
14n/a4429
14n/a3329
15n/a4418
15n/a3318

These LED driver chips require 17 pulses to load them. The first write pulse sets the mode. Since this is the same value for each chip, one pulse will be applied to all four chips. The next 8 pulses set the first two chips data values and the following 8 pulses set the second two chips data values. This logic requires a 5-bit counter. Since there are many 4-bit counters, I chose to add a flip flop to be the fifth counter bit. Since not all the states are required and to take advantage of a single 4 to 16 bit decoder chip, I use the following states.

StateDigit
11110Start State
11111Sent Mode
00000First Data Value
......
01111Last Data Value
10000Stop Counting

The OUTDAT pulse is as fast as 1 MHz which is much faster than the 2 Khz cycle timer to update the display and they are out of sync. To get them in sync one flip flop is used to capture the pulse. A second flip flop is then used to sync the signal. This is then used to start the counter and avoid a spurious write pulse. There are also two flip flops to represent the 5th bit of the counter. The first one captures the TC signal from the counter chip. The TC is set when all four bits are one. The next flip flop is set up as a toggle and toggles the next cycle, thereby changing to a one state when the counter goes to all zeros.

The DSKY consists of three boards. The front board is a solder board containing the astronaut facing keyboard, display and indicator lights. The middle board and back board are wire wrap boards. The middle board contains the four LED driver chips and the logic to drive the required data pulses. The back board is the majority of the logic.

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