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• Marvell 88SA8052 Reverse Engineering

  loudaslife • 03/04/2026 at 21:23 • 0 comments

  Lately I've been working on a more universally applicable version of this project, with more form factors and configuration options. I have no idea when or if that will be finished, so in the meantime I'll share some of the background research I've done while working on it.

  One of the key features of the new version will be support for the Marvell 88SA8052 bridge IC as an alternative to the JMicron JM20330 in the existing design.

  If you've spent a lot of time in relatively obscure corners of internet forums where people discuss retro PC hardware, you might've seen discussions about which PATA to SATA adapter provides the best performance and/or compatibility. Very little exists in the way of objective testing, but anecdotal opinions overwhelmingly favor adapters using the Marvell 88SA8052, and in particular, Startech's IDE2SAT2 adapter. Since this adapter seems to be the internet's gold standard, I figured it was worth buying one and reverse engineering the design for use as a reference.

  My last PCB reverse engineering was done entirely with a regular camera, a flatbed scanner, and a plain soldering iron. I wanted to do a slightly better job this time, so this was the perfect excuse to build a motorized microscope that could capture high resolution images with glare removal and minimal perspective distortion. For the disassembly, I used a hot air station to remove all the SMD components without damaging their pads. Rather than sanding the solder mask off, I chemically stripped it away using a concentrated sodium hydroxide solution. (Don't try that at home unless you're qualified to handle hazardous corrosive chemicals.) Lastly, I sanded the outer copper layers off and photographed the inner ones through the thin layer of FR4 that remained.
  

  I'm not sure why the inner layers appear black when viewed through the fiberglass, maybe that's just the color of the adhesive that's used to bond the copper to the substrate. Anyway, I can't upload the 10+ GB of raw uncompressed images here, but I'll upload some reasonably high resolution ones on the project page for anyone that wants to examine this board in more detail, along with the measured component values and the schematic.

  There are a number of things about this design that either seem questionable or I just don't understand. Feel free to leave a comment if you think you can help explain them.

  1. Pull resistors R3 and R8 (on DMARQ and IORDY respectively) seem unnecessary and possibly detrimental. There are pull resistors of these exact values specified in the ATA-ATAPI spec, but they're meant to be on the host side, not the device side. These are also specified as minimum values. So, assuming these resistors are present on the host side (as required by spec), the duplicated resistors on the adapter will divide the effective resistance in half, bringing it well below the minimum.
  2. Pull resistor R11 (on INTRQ) is, like the above, specified only for the host. But to make things even more complicated, this one is specified to be either a 10k pull up or a 6.2k pull down ("depending upon the level sensed"), so 10k pull down isn't a valid configuration even for the host.
  3. I don't know what they were trying to accomplish with D1 at all.
  4. The analog ground design seems questionable in a lot of ways. It connects the two analog ground pins of the bridge IC, the crystal load capacitors, and the analog power decoupling capacitors. The PCB itself has no connection between analog and digital ground, so any current flow between the two grounds has to go through the IC. I'm not experienced enough to say with confidence that this is bad, but I'm definitely not going to replicate it myself.
  5. I've yet to find any documentation that explains why UAO would be connected to an LED. Maybe that pin has an alternate function as an activity indicator, and it's explained in the elusive 88SA8052 datasheet. Regardless, this is the only implementation I've seen with UAO or UAI connected to anything...

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• First Test Results

  loudaslife • 10/02/2022 at 00:15 • 0 comments

  After assembling revision 1.0 of my adapter, I tested it in a Wyse V10L thin client. Surprisingly, it worked perfectly on the first attempt. With a bit of tinkering on the host and drive settings, this was the performance I got:
  

  The Kingston SSD was a $12 ebay purchase, probably salvaged from a Chromebook. Because the drive speaks SATA to the JM20330, it shows up as a SATA device in most disk info utilities, even though the OS sees it as an IDE drive.

  For comparison, this is how the same SSD benchmarks in AHCI mode on a SATA III port in a modern system:

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• JM20330 Reverse Engineering

  loudaslife • 08/14/2022 at 01:40 • 0 comments

  The central component of this project is a PATA to SATA bridge IC. Unfortunately, there doesn't appear to be any suitable chip with (officially) publicly available documentation, so figuring out how to use them can be tricky.
  

  The most common IC for this purpose is the JMicron JM20330. It's been used in other open source hardware projects, and can be purchased in small quantities relatively easily (though you won't find it on DigiKey or other reputable distributors.) You can even find a leaked old revision of its datasheet with some googling. However, the datasheet only gives limited information on the supporting components required. To fill in the gaps, I purchased what appears to be the official product evaluation board, the JM20330 EVB-002-3 "Host Bribge" Adapter.
  

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