I messed with m0-m1 in the last log.
XORing m0 indiscriminately leads to the forbidden combination 11 and it might not be reversible.
Parity should swap three states, not two, to be reversible and prevent the 11 case.
Setting parity : 00 -> 01 -> 10 -> 00
removing parity : 00 -> 10 -> 01 -> 00
| m1-m0 | set | remove |
| 00 | 01 | 10 |
| 01 | 10 | 01 |
| 10 | 00 | 00 |
Good news everybody : set and remove are the same circuit, just with m0 and m1 swapped...
This gets down to a 3-input LUT which can be simplified because 11 is not a valid input.
| m1 | m0 | p | m1' | m0' |
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 1 |
| 0 | 1 | 0 | 0 | 1 |
| 0 | 1 | 1 | 1 | 0 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 0 |
| 1 | 1 | 0 | X | X |
| 1 | 1 | 0 | X | X |
From there we get :
m1' = (/m1 . m0 . p) | ( m1 . /m0 . /p) m0' = (/m1 . /m0 . p) | (/m1 . m0 . /p)
Again, mostly the same equations. m0' is easy :
m0' = /m1 . (/m0 . p) | ( m0 . /p)
= /m1 . (m0 ^ p)
m1' is something else but we can reuse m0^p
m0 ^ p = / ((m0 . p) | (/m0 . /p))
m1' = (m1^m0) . /(m0^p) <= available earlier
= (m1^ p) . /(m0^p)
When tested with circuitjs, it works ! and VHDL is fine too.

Time to put it back into the main circuit.
Yann Guidon / YGDES
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