This uses 17 GPIOs for generating VGA signals, I used the
50 MHz clock to generate a 800 x 600 72hz 15 bit color image.
32 dual port M9K blocks are used as a 1bpp 512x512 image buffer.
I have a diffusion-limited aggregation module writing into this buffer,
the rest of the screen is filled with 8 moving 64x64 colored blocks,
and the backdrop is created from a 32 bit linear feedback shift register.
I'm attempting a Nintendo style PPU, 256 x 192, with 32 sprites and 4 BG layers.
16 M9K blocks will be used in dual port mode to read 32 sprite pixels
at once, and the 32MB of SRAM is fast enough to do at least 4 reads per pixel
for 15 bit color bitmap layers.
Added support for a SNES controller and a N64 controller, the SNES was simple, with the N64, I had to use a 2 MHz nyquist rate sample to work reliably.
Added a simple CPU core, using M9K blocks, and supports 3 instructions so far, "NOP", "INC REG", "DEC REG".