• Power Selector States and Updated PMOS Simulation Set-Up

    Ghani Lawal4 hours ago 0 comments

    State of Buck Converter State of ST-Link 3.3V pin VsVo (V) Io (mA) State Name
    9V plugged in, output 3.3V Plugged in, Output 3.3V Buck 3.3 10 A1
    9V plugged in, output 3.3V Unplugged, Open Circuit Buck 3.3 10 A2
    9V Unplugged, High Output Impedance Buck Plugged in, Output 3.3V ST-Link 3.3 10 A3
    9V Unplugged, High Output Impedance Buck Unplugged, Open Circuit None GND 0 A4
    9V Unplugged, Low Output Impedance Buck Plugged in, Output 3.3V ST-Link 3.3 10 A5
    9V Unplugged, Low Output Impedance Buck Unplugged, Open Circuit None GND 0 A6
    • Updated simulation schematic to better reflect the hardware implementation
    • Made a table of the different states the power selector can take, along with the expected output
      • ***Depending on the design of the buck converter, the output impedance when it is not receiving power can be so high it is basically an open circuit or "low"
      • Either way, you don't want to develop a potential at the output terminal if it is disconnected from it's own power source
    • Will make a separate file for each state instead of trying to simulate them in the same transient simulation

  • Original Design with Source Connected PMOS

    Ghani Lawal4 hours ago 0 comments

    - get's rid of bi-directional issue without decreasing Vo

  • Original Design & Test, but with PNP

    Ghani Lawal4 hours ago 0 comments

    • Don't have the same bi-directionality issue that FETS possess
    • However, they have a higher on state resistance
      • Vo(FET) ~= 2.299
      • Vo(BJT) ~= 2.28__

  • Original Design & Test for Power Selector (with PMOS)

    Ghani Lawal4 hours ago 0 comments

    • This is where I noticed the issue of the MOSFETS Bi-directionality
    • Never actually "electrically disconnected" voltage sources from circuit -> likely created erroneous results
    • Later tried using the voltage controlled switch "SW" that is native to LTSpice, set Ron = 1 ohm and Roff = 1/10/100 Mohms
      • Not sure how to explain it, but there may have been some "odd behavior" with this set up, however I do not believe it is worth my time to look into this

  • LTSpice Simulations and Transistor Notes

    Ghani Lawal2 days ago 0 comments

    • For whatever reason, generic transistors in LTspice (pmos, nmos, npn and pnp options) have a large on-state resistance
      • Whenever I am simulating a transistor circuit ALWAYS use a real transistor to avoid "weird" simulation results
    • ***MOSFETS: both pmos and nmos, are really bi-directional devices, while, for example, nmos transistors are suppose to have current flow from the drain to the source, if the voltage at the source is higher than the voltage at the drain and the gate is high, then current can flow from the source to the drain.  Vice versa for pmos transistors.
      • Need to place two transistors, of the same type (2nmos or 2pmos) in series with their sources connected to prevent this

  • 3.3V Buck and STLink 3.3V pin Voltage selector

    Ghani Lawal2 days ago 0 comments

    • Making a circuit to automatically select the 3.3V power source:
      • Buck converter as priority
      • ***Input impedance of buck-boost converter's output pin will vary based on the design of the buck converter.  It could range from very high (practically open) to low (due to passive paths or body diodes)
        • Applying a 3V to the output of an unpowered buck-boost converter, i.e. a pre-biased condition can harm the IC unless it is explicitly designed to handle pre-biased conditions
    • Testing circuits in LTspice to see what works

  • Microcontroller

    Ghani Lawal2 days ago 0 comments

    • Decided on STM32G030F6P6:
      • ROM: 32KB
      • RAM: 8KB
      • Up to 64MHz clock speed

  • Requirements Document

    Ghani Lawal2 days ago 0 comments

    • Finished First draft of requirements document:
      • Input voltage range is now 5V to 10V
      • Output voltage range is now 0V to 20V
      • Must be able to deliver 500mA at 20V to an external load
        • i.e. Output 10W
      • According to ChatGPT microprocessor should have at least:
        • 8-16MHz clock
        • 32-64kB or ROM
        • 4-8kB of RAM
      • Use at least 10 bits for ADC
      • Update display 4-10 times per second

  • "Final" Block Diagram and Voltage Control Circuit

    Ghani Lawal2 days ago 0 comments

    • There will be no connection between the voltage controller and the microcontroller
    • The potentiometer will be placed in R1

  • Initial System Block Diagram and Lower Level Requirements

    Ghani Lawal2 days ago 0 comments

    • Power Supply:
      • 3.3V power for the microcontroller, display and output voltage controller
      • Vi = 5 : 30V
        • Will power the 3.3V regulator
        • Sensed by input voltage and current sensor
        • Powers output power converter
    • Microcontroller:
      • Low amount of processing, low clock speed required, 8MHz, maybe even 4MHz
      • Has ADC pins (accuracy not a huge issue here)
        • Need 5 (Vi, Ii, Vo, Io) + voltage output controller
      • Peripherals: want SPI to communicate with the display
    • Display:
      • Show 4 rows of text at least
      • Vi, Vo, Io and Ii for efficiency
      • Possesses an SPI interface
    • Output Voltage Controller:
      • Outputs 0V to 40V DC
      • Use a switching regulator for efficiency
      • Adjustable
    • Voltage Sensing:
      • Vi and maybe Vo will be higher than 3.3V
      • Will need to attenuate the value, will use a voltage divider and a voltage buffer
    • Current Sensing: