A number of other applications work with 16-bit words, they don't seem to need control and/or parity.

From there it becomes easy to use the saved 2 bits as TMPI/inversion bits, using one bit for the inversion and 4 bits of data/payload.

Going 32-bit is as easy as : one 16-bit word (4 cycles) with one clock direction, and another word is the opposite clock direction. An "aborted" cycle would do the framing.

At that point, I wonder if/how the clock signals could become part of the inverted word, and how to recover the combined transition/word (3 down to 2 signals), if it's even possible... => the answer is "it does not matter":

• 4 data bits get TMPI => 5 bits where only 3 change
• 2 clock bits where only one changes
• total : 4 bits change over 7.

If the clock signals are TMPIed, then that's 6+1 bits => 4 changes.

Result/change is the same, but one is simpler and more straight-forward, following the existing clocking scheme.