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DE0-Nano FPGA board
Terasic DE0-Nano, Altera Cyclone IV E EP4CE22F17C6N, 22,320 LEs, 32 MB SDRAM, 50 MHz oscillator, USB-Blaster
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CP2102 USB-to-TTL serial module
Silicon Labs CP2102, 3.3 V logic, 921,600 baud, carries upload, framebuffer, console and keyboard
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.96 inch I2C OLED module
0128x64 monochrome, SSD1306 or SH1106 or SSD1315 class controller, address 0x3C
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Mini-USB cable
Board power and USB-Blaster JTAG programming
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Jumper wires
OLED: VCC to JP1 pin 29, GND to pin 12, SCL to pin 6, SDA to pin 8 | Serial: module TXD to JP1 pin 2, module RXD to JP1 pin 4, GND to pin 12
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4.7 kohm pull-up resistors
Only if the OLED breakout does not have them; weak pull-ups are already enabled on PIN_A3 and PIN_B4 in the Quartus settings
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Host PC with a USB port
Runs the uploader and the frame viewer; not needed once the boot-from-flash work is finished
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