One thing that's been very annoying in coding is how I interface to the memory.  I have a 16-bit page register that allows me to access 128 memory locations with the source/destination bus.  So when I push/pop I have to change my memory page to the stack.  Then I lose access to my other variables.  Copying a variable onto the stack is tough because I have to store it in the few registers I have, change the memory page, and then copy it back without disturbing those registers.  

I would really like to be able to access the whole 16-bit memory at any time.  The old 6502 allows you to access the whole 16-bit memory space and I'm jealous.  This would let me pop/push without losing access to my other memory space.  I can move variables onto the stack easily.  And I can transfer from anywhere to anywhere in my memory very easily.  

Implications:

So the memory map will look something like: 

• Each instruction now goes from 16-bits to 32-bits.  So my programs increase in size pretty quickly. 
• I'll have to rewrite all the code I previously wrote.
• The new instruction cycle would be two fetches for the source address, copy the source data to a temporary register, two more fetches for the destination, then write the temporary register to the destination - 6 clock operation.  Boy this went up fast from my original desire for 1 clock per instruction!
• I won't need a LOAD register anymore.   It will be trivial to put a 256 constants in the ROM and do a transfer from there.  This removes all the LOAD register chips.
• The pointer address register will have to change to point to a 16-bit address, so a HI and LO register.
• I'll have to change the boot vector to 0x0100.
• I'll have to decode a 16-bit address now, but maybe I can just check if the upper byte is all zeros.

This is almost a complete tear-up of the design.  However, it will be much easier and elegant to code for this CPU (and more fun).  And I don't think it will increase the chip count