I have updated the VHDL code to implement the change to a single 16-bit address space which includes the register space and the RAM/ROM space.  It seems to be working ok.  

I'm rewriting the bootloader for this new architecture.  I'm still debugging, but it is definitely easier and more fluid to write code for this.  However, the code is generating almost twice the memory size as expected (about 1.8x) even though it's fewer instructions.  I'm pretty happy with this change.  I notice I do a lot of LOAD-type commands which are now more straight-forward since I'm just copying from the ROM.

I've found in this iteration the ALU and pointer registers are really more like peripherals.  It's almost like if you took a 6502 and added a co-processor for floating bit operations, except all operations are done in the peripherals.  So outside of the peripherals and memory, it's just a simple state machine, a couple of counters to hold the program counter, and a couple registers for the source/destination address.  If I was in the early 1970s, I could have made an ASIC with this and then bring out the data and address bus to an external RAM/ROM and peripherals like an ALU or UART, etc.  I may reorganize my block diagram to show this better.  In doing this project it makes me realize that an ALU is not necessary for a minimum-viable CPU (Turing complete).