Project Logs

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• Waiting....

  Marcel Ochsendorf • 06/14/2017 at 19:50 • 0 comments

  So all needed smd parts arrived and my current task it to rewrite the software.

  I hope the pcbs will arrive next week.

  So stay tuned!

• Creating the first CAD parts for 3d printing

  Marcel Ochsendorf • 06/08/2017 at 22:51 • 0 comments

• CLOSER IMAGE

  Marcel Ochsendorf • 06/08/2017 at 18:48 • 2 comments

• ALL COMPLETE

  Marcel Ochsendorf • 06/08/2017 at 15:28 • 3 comments

• finalize the last pcb layers

  Marcel Ochsendorf • 06/08/2017 at 10:35 • 2 comments

• DRC ERRORS

  Marcel Ochsendorf • 06/07/2017 at 19:11 • 5 comments

  The final testing. The ERC has no issues but the DRC has some StopMask errors

• ADDED GND PLANE

  Marcel Ochsendorf • 06/07/2017 at 11:37 • 3 comments

• ADDED CAPS AND WS ROUTING

  Marcel Ochsendorf • 06/07/2017 at 07:51 • 0 comments

  Please note the vias under the ATmega.

• Next PCB try

  Marcel Ochsendorf • 06/06/2017 at 10:37 • 6 comments

  Here is a picture of the current work.

• Next PCB try

  Marcel Ochsendorf • 06/06/2017 at 10:35 • 0 comments

  Here is a picture of the current work.

View all 13 project logs