I've just taken delivery of the PCBs for the 64-bit core memory planes:

The cores themselves will reside in the central holes, with the X and Y select lines running between the pin headers. There are 4 FFC (flat flexible cable) connectors around the outside for running the X and Y lines through the stack, and 2 JST headers on the left for the SENSE and INHIBIT lines.

8 of these PCBs will stack to make a 64-byte memory, and the stack will plug into a panel via pin headers on the bottom plane. The panel will have the line drivers, sense amplifier and flip-flops for shuttling data in and out of the memory.

I will need to do some experimentation with a single plane before proceeding to the final panel design.