• Edge AI Selection Guide: Assess the Technical Advantages of the FET1126BJ-S SoM in 3 Minutes

    03/27/2026 at 07:35 • 0 comments

    In edge AI development, hardware selection often determines the fundamental stability and development timeline of a project. To help developers bypass lengthy parameter comparisons, this article will break down key technical points in just 3 minutes, providing an in-depth look at the Forlinx Embedded FET1126-S SoM. Designed based on Rockchip RV1126BJ, this module is specifically engineered to overcome performance bottlenecks and optimize power efficiency for on-device AI deployment. This guide enables a swift evaluation of how well the solution fits project requirements.

    Forlinx Embedded FET1126BJ-S SoM product appearance and core positioning

    Click above to explore the FET1126BJ-S SoM in detail

    Overview of FET1126BJ-S Key Features

    To enable rapid evaluation of hardware compatibility, the four core technical advantages of this Rockchip RV1126BJ-based System-on-Module (SoM) in edge AI applications are summarized:

    • Balanced Performance & Power: 3 TOPS @ INT8 AI computing power, capable of running 2B-parameter models locally, with low-power design suitable for portable and embedded devices.
    • Complete Software Ecosystem: Comprehensive BSP support, compatibility with mainstream frameworks, enabling quick onboarding for beginners and shorter development cycles.
    • Powerful Vision Processing: Commercial-grade hardware delivering industrial-grade performance, requiring no customization, with controllable mass production costs.
    • Industrial-Grade Reliability: Wide operating temperature range (-40℃ to 85℃), electromagnetic interference resistance, suitable for extreme environments such as factory floors and outdoor applications.

    Four core technical pillars of FET1126BJ-S including performance, ecosystem, vision, and reliability

    1 Minute to Lean Key Specifications

    • Core AI Performance: Built-in independent NPU with 3 TOPS @ INT8 computing power, supporting mixed-precision operations and Transformer model optimization. Capable of running 2B-parameter LLMs and multimodal models locally, eliminating cloud dependency, and well-suited for diverse edge AI scenarios.
    • Processor Performance: Rockchip RV1126BJ quad-core ARM Cortex-A53, up to 1.6GHz, ensuring smooth multitasking.
    • Image Processing: VPU supports 4K@30fps H.264/H.265 hardware decoding, AI-ISP supports 8M@30fps input with denoising, HDR, etc., without consuming NPU resources.
    • Storage & Size: LPDDR4 memory (1/2/4GB optional), eMMC storage (8/16/32/64GB optional). Commercial-grade chips cover wide-temperature range; compact 40mm × 40mm form factor, combined with stamp hole and LGA connectors, featuring 237 pins for excellent expandability, saving space in end devices.

    Detailed hardware architecture and technical parameters of the RV1126BJ-based SoM

    1 Minute to Learn Application Scenarios

    Forlinx Embedded FET1126BJ-S SoM avoids ''over-engineering'' and focuses on precise fit for mainstream use cases, ensuring every advantage translates into practical applications across popular smart domains:

    • Smart Security: Suitable for IP cameras, facial access control systems. Leveraging 3 TOPS AI power to perform real-time facial recognition and anomaly detection without cloud dependency. Fully compatible with offline facial recognition SDK, widely applied in subway facial access and smart community systems.
    • Smart Industry: Embedded in industrial inspection equipment, utilizing rich industrial bus interfaces and AI computing for defect detection and equipment failure prediction.
    • Smart Construction Sites / Campuses: Paired with edge terminals to enable safety detection (e.g., helmet compliance, intrusion detection) with fast local inference for timely alerts, ensuring construction and campus safety.
    • Automotive Aftermarket: Wide-temperature and low-power characteristics make it ideal for dashcams, driver behavior analysis, and other in-vehicle terminals, ensuring stable operation.

    Visual representation of FET1126BJ-S applications in security, industry, and smart campuses

    Final Minute: Why Choose Forlinx Embedded?

    While many RV1126BJ-based solutions exist in the market, for developers focused on project implementation, hardware is just the beginning—reliable ecosystem support and long-term supply are the real necessities:

    • Simplified Development: Pre-installed Linux...
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  • How to Enable Core Dump for Debugging on RK3568 with Buildroot (Linux 5.10 Kernel)

    03/09/2026 at 05:54 • 0 comments

    1. Overview

    In embedded Linux product development, debugging, and delivery, crashes like segmentation faults and stack overflows are common. Serial logs alone often cannot pinpoint the exact failure scenario.

    Core Dump is a crucial debugging mechanism provided by the Linux operating system: when a process terminates abnormally, the system saves the key runtime state of the process at the moment of the crash (including memory image, registers, call stack, etc.) into a file. Developers can use debugging tools like gdb to perform offline analysis on this file, enabling them to quickly identify the root cause of the issue.

    This article uses the OK3568 platform (Linux Kernel 5.10 + Buildroot) as an example to provide a detailed explanation of how to enable Core Dump functionality and offers practical debugging methods, applicable to scenarios such as application development, system integration, and customer issue analysis.

    2. Core Dump Concepts

    Core Dump may be triggered when an application exits abnormally due to the following situations:

    • Accessing illegal memory (Segmentation Fault)
    • Null pointer or wild pointer access
    • Stack overflow
    • Illegal Instruction
    • Program actively calling abort()

    The generated core file is essentially a snapshot of the process’s address space at the moment of the crash, mainly including:

    • The virtual memory content of the process (code segment, data segment, heap, stack)
    • CPU register states
    • Thread information
    • Signal information (the type of signal that caused the crash)

    With the core file, issues can be reproduced without the target board, significantly improving the efficiency of problem analysis.

    3. OK3568 Buildroot System Default Operation Description

    In the default Buildroot system for OK3568 (Linux kernel 5.10), core dump is disabled.

    Core Dump default function is disabled.

    When an application crashes, no core file is generated automatically.

    To enable in-depth debugging or scenario reproduction, please manually enable this function.

    4. Steps to Enable Core Dump

    On the 3568 Linux 5.10 board, core dump is disabled by default.

    Checking the default core dump status on RK3568 board

    To enable it on the board:

    4.1 Create a core dump directory

    It is recommended to save the core file under a persistent partition that the user can read and write, such as /userdata 

    mkdir -p /userdata/core

    Creating a directory for core dump files on RK3568

    4.2 Set directory permissions

    Allow any process to write to it during debugging: 

    chmod 777 /userdata/core

    Setting 777 permissions for the core dump directory

    Note: For production systems, restrict permissions according to security policy. 777 is not recommended for long-term use.

    4.3 Set core file directory

    Configure the kernel to save cores with a descriptive name in the directory: 

    echo "/userdata/core/core.%e.%p" > /proc/sys/kernel/core_pattern

    Parameter description:

    %e：executable name

    %p：process PID

    Example generated file: 

    core.myapp.1234

    4.4 Allow core dump generation

    Lift the core dump size limit for the current shell: 

    ulimit -c unlimited

    Note: This setting is session‑specific. To apply permanently, add the command to your startup script.

    4.5 Verify if core dump is enabled

    After enabling, use the ulimit -c command to check whether the dump feature is active.

    If the output is 0, it indicates that the dump function is disabled.

    If the output is unlimited, it indicates that the dump function is enabled.

    Verifying ulimit settings to confirm core dump is enabled

    5. Verify core dump generation

    After completing the setup above, run your target application.

    When the program crashes (e.g., due to a segmentation fault), a core file will be generated in the configured directory (/userdata/core/) with the following naming pattern: 

    core.<program_name>.<process_pid>

    6. Debug with GDB

    6.1 Basic debug command

    Use a matching GDB (typically...

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  • Real-Time Control on Linux: Preempt-RT + IgH EtherCAT Master on OK3576-C

    02/12/2026 at 02:10 • 0 comments

    In the industrial automation, achieving microsecond-level hard real-time control on general-purpose Linux systems has always been a key challenge for high-precision applications such as robotics and multi-axis motion control. The open-source IgH EtherCAT Master protocol stack, with its exceptional high real-time performance and low jitter characteristics, serves as a critical bridge connecting industrial fieldbus networks to upper-layer applications. However, unlocking its full potential relies on the robust support of the Preempt-RT real-time kernel.

    Based on the Forlinx Embedded OK3576-C development board, this article demonstrates microsecond-level communication jitter control under CPU-isolated cores and full-load stress. Through comparative tests of 1ms synchronous speed mode and 125µs synchronous torque mode, it presents a practical, high-performance real-time industrial control solution.

    Its Performance is Impressive!

    In cycle synchronous velocity mode, cycle jitter was reduced from 6.3080 μs to 3.5790 μs.

    In cycle synchronous torque mode, cycle jitter was reduced from 50.0470 μs to 2.1130 μs!

    01 What is IgH EtherCAT Master?

    Before answering this, let's first understand: What is EtherCAT? EtherCAT is one of the fastest-growing industrial Ethernet protocols. It adopts a hardware-driven architecture and offers multiple advantages including high speed, large data transmission capacity, long transmission distance, short update cycles, and support for a large number of connected devices.

    What is IgH EtherCAT Master

    IgH EtherCAT is an open-source EtherCAT master running on Linux systems. It creates a Linux character device, allowing applications to communicate with the EtherCAT master module through this interface.

    What is IgH EtherCAT Master

    It has three parts:

    1. Master Module

    Acts as the ''brain'' and core of the EtherCAT master.

    Manages EtherCAT bus communication and handles data exchange and synchronization between master and slaves. Provides interfaces for both low‑level drivers and upper‑layer applications.

    2. Device Modules

    Real‑time optimized Ethernet drivers (e.g., stmmac for Rockchip RK platforms).

    Bridge between the master and physical network ports. Intelligently separates traffic: selected devices handle EtherCAT frames; others operate as regular Ethernet devices, enabling EtherCAT and standard networking to run in parallel.

    Real-Time Control on Linux: Preempt-RT + IgH EtherCAT Master on OK3576-C

    3. Application

    Executes user‑defined logic.

    Requests bus control from the master via API. Once granted, configures the bus and performs cyclic process‑data exchange. Can be implemented as a kernel module or a user‑space program using EtherCAT/RTDM libraries.

    Real-Time Control on Linux: Preempt-RT + IgH EtherCAT Master on OK3576-C

    Contact us to obtain the official IgH EtherCAT Master source code and technical manual.

    02 Real‑Time Kernel: Preempt‑RT

    1. Key Advantages:

    To ensure high real‑time performance, IgH EtherCAT Master must run on a real‑time operating system. Preempt‑RT is a Linux kernel optimized for real‑time performance, offering clear advantages over standard Linux:

    ① Hard Real‑Time Guarantee:

    Provides deterministic task completion within strict deadlines, unaffected by other tasks.
    Essential for time‑critical applications such as industrial automation and aerospace.

    ② Efficient Scheduling & Low Latency:

    Employs priority‑based preemptive scheduling, allowing high‑priority tasks to immediately preempt lower‑priority ones.
    Deeply optimizes interrupt handling to drastically reduce response times and eliminate system jitter.

    ③ High‑Precision Timing:

    Delivers microsecond‑level kernel timer accuracy.
    Supports real‑time extensions and kernel customization to meet precise cyclic communication requirements of EtherCAT.

    2. Real‑Time Performance Testing

    This test references the Rockchip RealTime Linux Performance Test Report and is divided into idle-load testing and stress testing. Test Environment:

    ① Tool: cyclictest

    ② Hardware Platform: OK3576-C Development Board

    ③ Kernel Version: 6.1.118-rt36

    ④ Path：SDK/docs/rk35xx/Patches/Real-Time-Performance/PREEMPT_RT/kernel-6.1/kernel-6.1.118...

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