-
How to Enable Core Dump for Debugging on RK3568 with Buildroot (Linux 5.10 Kernel)
03/09/2026 at 05:54 • 0 commentsRead more »1. Overview
In embedded Linux product development, debugging, and delivery, crashes like segmentation faults and stack overflows are common. Serial logs alone often cannot pinpoint the exact failure scenario.
Core Dump is a crucial debugging mechanism provided by the Linux operating system: when a process terminates abnormally, the system saves the key runtime state of the process at the moment of the crash (including memory image, registers, call stack, etc.) into a file. Developers can use debugging tools like gdb to perform offline analysis on this file, enabling them to quickly identify the root cause of the issue.
This article uses the OK3568 platform (Linux Kernel 5.10 + Buildroot) as an example to provide a detailed explanation of how to enable Core Dump functionality and offers practical debugging methods, applicable to scenarios such as application development, system integration, and customer issue analysis.
2. Core Dump Concepts
Core Dump may be triggered when an application exits abnormally due to the following situations:
- Accessing illegal memory (Segmentation Fault)
- Null pointer or wild pointer access
- Stack overflow
- Illegal Instruction
- Program actively calling abort()
The generated core file is essentially a snapshot of the process’s address space at the moment of the crash, mainly including:
- The virtual memory content of the process (code segment, data segment, heap, stack)
- CPU register states
- Thread information
- Signal information (the type of signal that caused the crash)
With the core file, issues can be reproduced without the target board, significantly improving the efficiency of problem analysis.
3. OK3568 Buildroot System Default Operation Description
In the default Buildroot system for OK3568 (Linux kernel 5.10), core dump is disabled.
Core Dump default function is disabled.
When an application crashes, no core file is generated automatically.
To enable in-depth debugging or scenario reproduction, please manually enable this function.
4. Steps to Enable Core Dump
On the 3568 Linux 5.10 board, core dump is disabled by default.
To enable it on the board:
4.1 Create a core dump directory
It is recommended to save the core file under a persistent partition that the user can read and write, such as /userdata
mkdir -p /userdata/core
4.2 Set directory permissions
Allow any process to write to it during debugging:
chmod 777 /userdata/core
Note: For production systems, restrict permissions according to security policy. 777 is not recommended for long-term use.
4.3 Set core file directory
Configure the kernel to save cores with a descriptive name in the directory:
echo "/userdata/core/core.%e.%p" > /proc/sys/kernel/core_pattern
Parameter description:
%e:executable name
%p:process PID
Example generated file:
core.myapp.1234
4.4 Allow core dump generation
Lift the core dump size limit for the current shell:
ulimit -c unlimited
Note: This setting is session‑specific. To apply permanently, add the command to your startup script.
4.5 Verify if core dump is enabled
After enabling, use the ulimit -c command to check whether the dump feature is active.
If the output is 0, it indicates that the dump function is disabled.
If the output is unlimited, it indicates that the dump function is enabled.
5. Verify core dump generation
After completing the setup above, run your target application.
When the program crashes (e.g., due to a segmentation fault), a core file will be generated in the configured directory (/userdata/core/) with the following naming pattern:
core.<program_name>.<process_pid>
6. Debug with GDB
6.1 Basic debug command
Use a matching GDB (typically...
-
Real-Time Control on Linux: Preempt-RT + IgH EtherCAT Master on OK3576-C
02/12/2026 at 02:10 • 0 commentsIn the industrial automation, achieving microsecond-level hard real-time control on general-purpose Linux systems has always been a key challenge for high-precision applications such as robotics and multi-axis motion control. The open-source IgH EtherCAT Master protocol stack, with its exceptional high real-time performance and low jitter characteristics, serves as a critical bridge connecting industrial fieldbus networks to upper-layer applications. However, unlocking its full potential relies on the robust support of the Preempt-RT real-time kernel.
Based on the Forlinx Embedded OK3576-C development board, this article demonstrates microsecond-level communication jitter control under CPU-isolated cores and full-load stress. Through comparative tests of 1ms synchronous speed mode and 125µs synchronous torque mode, it presents a practical, high-performance real-time industrial control solution.
Its Performance is Impressive!
In cycle synchronous velocity mode, cycle jitter was reduced from 6.3080 μs to 3.5790 μs.
In cycle synchronous torque mode, cycle jitter was reduced from 50.0470 μs to 2.1130 μs!
01 What is IgH EtherCAT Master?
Before answering this, let's first understand: What is EtherCAT? EtherCAT is one of the fastest-growing industrial Ethernet protocols. It adopts a hardware-driven architecture and offers multiple advantages including high speed, large data transmission capacity, long transmission distance, short update cycles, and support for a large number of connected devices.
IgH EtherCAT is an open-source EtherCAT master running on Linux systems. It creates a Linux character device, allowing applications to communicate with the EtherCAT master module through this interface.
It has three parts:
1. Master Module
Acts as the ''brain'' and core of the EtherCAT master.
Manages EtherCAT bus communication and handles data exchange and synchronization between master and slaves. Provides interfaces for both low‑level drivers and upper‑layer applications.
2. Device Modules
Real‑time optimized Ethernet drivers (e.g., stmmac for Rockchip RK platforms).
Bridge between the master and physical network ports. Intelligently separates traffic: selected devices handle EtherCAT frames; others operate as regular Ethernet devices, enabling EtherCAT and standard networking to run in parallel.
3. Application
Executes user‑defined logic.
Requests bus control from the master via API. Once granted, configures the bus and performs cyclic process‑data exchange. Can be implemented as a kernel module or a user‑space program using EtherCAT/RTDM libraries.
Contact us to obtain the official IgH EtherCAT Master source code and technical manual.
02 Real‑Time Kernel: Preempt‑RT
1. Key Advantages:
To ensure high real‑time performance, IgH EtherCAT Master must run on a real‑time operating system. Preempt‑RT is a Linux kernel optimized for real‑time performance, offering clear advantages over standard Linux:
① Hard Real‑Time Guarantee:
Provides deterministic task completion within strict deadlines, unaffected by other tasks.
Essential for time‑critical applications such as industrial automation and aerospace.② Efficient Scheduling & Low Latency:
Employs priority‑based preemptive scheduling, allowing high‑priority tasks to immediately preempt lower‑priority ones.
Deeply optimizes interrupt handling to drastically reduce response times and eliminate system jitter.③ High‑Precision Timing:
Delivers microsecond‑level kernel timer accuracy.
Supports real‑time extensions and kernel customization to meet precise cyclic communication requirements of EtherCAT.2. Real‑Time Performance Testing
This test references the Rockchip RealTime Linux Performance Test Report and is divided into idle-load testing and stress testing. Test Environment:
① Tool: cyclictest
② Hardware Platform: OK3576-C Development Board
③ Kernel Version: 6.1.118-rt36
④ Path:SDK/docs/rk35xx/Patches/Real-Time-Performance/PREEMPT_RT/kernel-6.1/kernel-6.1.118...
Read more » -
OK3568 Platform Electric Bicycle Recognition Solution: From Model Training to Hardware Deployment
02/11/2026 at 03:43 • 0 commentsTraining Your Own YOLOv5 Model
1. Environment Preparation
1.1 Install the Required Software
The following steps are performed in a Windows 11 environment:
Required Software:
Anaconda (Python virtual environment management tool)
Git (to clone the YOLO source code)
PyCharm (Python IDE)Anaconda Installation:
https://blog.csdn.net/Natsuago/article/details/143081283?spm=1001.2014.3001.5501
PyCharm Installation:
Git Installation: https://blog.csdn.net/weixin_45811256/article/details/130925392
1.2 Clone YOLO Repository
Navigate to the directory where you want to store YOLO on your Windows system, open the Command Prompt (cmd), and enter the following command to clone the repository:
git clone https://github.com/ultralytics/yolov5
1.3 Set Up a Virtual Python Environment and Install Dependencies
conda create -n gityolov5 python=3.8 -y //It is strongly recommended to use Python 3.8, as other versions may cause errors.
Install Dependencies: Navigate to the YOLO directory and activate the Python 3.8 virtual environment.
J:\yolov5>conda activate gityolov5 //Enter the environment just created (gityolov5) J:\yolov5>pip install -r requirements.txt -i https://mirrors.huaweicloud.com/repository/pypi/simple //Install required dependencies
Setup is complete. Now test if it runs successfully:
Open the downloaded yolov5 folder in PyCharm.
Open Settings and add a Python interpreter.
Note: It's usually under the directory where Conda is installed, or specifically under the envs folder of that path, containing the name of the virtual environment you created:
Open the train.py file and click ''Run''
If you see results similar to the example image you have, the environment is successfully installed.
2. Dataset Preparation
Due to version compatibility issues, it is recommended to install a new Python 3.9 environment specifically for this step ( other versions may have conflicts; Python 3.9 is strongly recommended).
J:\yolov5>conda create -n label python=3.9 -y J:\yolov5>conda activate label (label) J:\yolov5>pip install labelimg -i https://mirrors.huaweicloud.com/repository/pypi/simple (label) J:\yolov5>labelimg
The labeling tool LabelImg is now ready:
The following task involves labeling the material images and storing them.
Create the following directory:
datasets -> (Project name, e.g., ''bike'' used here)
There are two folders under both the images and label directories. They are train and val. Train stores resources used for training, and Val stores resources used for validation. You can think of train as practice questions and Val as exam papers.
Images stores picture files, and labels stores annotation information. The labels are txt files containing coordinates.
The following is the annotation process:
C:\Users\2020>conda activate label (label) C:\Users\2020>labelimg //Open the annotation tool
For the training set (train): Open the directory containing the training images.
Open the directory for saving the training annotation files.
First, ensure the format is set to YOLO.
Then, click "Create RectBox" to draw a bounding box around the target object. Finally, set the object label.Press Ctrl + S to save the annotation, then click the next image in the list at the bottom right corner. Repeat this process for all images. label
The annotation process for the Val (validation) set is the same.
Train the model
Create a configuration file in the yolov5/data directory.
# Train/val/test sets as 1) dir: path/to/imgs, 2) file: path/to/imgs.txt, or 3) list: [path/to/imgs1, path/to/imgs2, ..] path: J:\yolov5\datasets\bike2 # dataset root dir train: images/train # train images (relative to 'path') val: images/val # val images (relative to 'path') test: # test images (optional) # Classes nc: 1 # number of classes names: ['bike'] # class names
Download YOLOv5 Pretrained Model:
https://github.com/ultralytics/yolov5/releases
Edit Configuration:
In the red box, add the following:...
Read more »
Lutetium
Rui Santos
Thane Hunt
Max.K
Michiel Spithoven
Radu Motisan
Stephane
dev-lab
CNLohr
1BarConnection
Xylitol
Alex M Sunny
AVR
Makerfabs
Adrian Prinz