Jelly

Most of opcodes of brainfunk are simple sequences of simple states, that could be mixed using OR, also  to select and enable  buffers.

But for  '[' and ']'  need know a result of a test if value is zero and change the behavior from 'execute' to 'search'.

Jelly does it by using  pages on eeproms, with diferent set of finite states. Simple as turn on a bit, but not.  

Pages are mapped with high byte of eeprom, (in a at28c16 uses a8-a10 for 8 pages) and some logic must set and unset this bits.

------------------------------- paused, will continue

Brainfuck is a complete Turing language, (http://brainfuck.org/utm.b).

For who do not know brainfunk, look at code bellow, see also http://www.hevanet.com/cristofd/08.html

[golden.b -- compute golden ratio
(c) 2019 Daniel B. Cristofani
http://brainfuck.org/]

+>>>>>>>++>+>+>+>++<
[
    +[--[++>>--]->--[ 
    +[+<+[-<<+]++<<
    [-[->-[>>-]++<[<<]++<<-]+<<]
    >>>>-<<<<<++<-<<++++++
    [<++++++++>-]<.---<
    [->.[-]+++++>]>
    [[-]>>]            
    ]+>>--]+<+[-<+<+]++>>    
    ]<<<<[[<<]>>[-[+++<<-]+>>-]++[<<]<<<<<+>]    
    >[->>[[>>>[>>]+[-[->>+>>>>-[-[+++<<[-]]+>>-]
    ++[<<]]+<<]<-]<]]>>>>>>>
]

This program computes the "golden ratio" 
(https://oeis.org/A001622). 
Because this number is infinitely long, 
this program doesn't terminate on its own;
you will have to kill it.

Jelly uses tapes. Sequential tapes and only two types of loops:

One checks if  data value is zero then moves forward until matched, other checks if  data value is not zero then moves backward until matched.

All loops must be running by compare the value at tape with [ and ] and increment or decrement a counter, forward or backward a step, until counter is zero.

As pseudo code shows, both loops only differs at forward and backward move.

By using a byte as counter, a maximum nested loops is 255.

how make nested [ and ] ?

// for [
cnt=0;
do {
    if (*dp == ‘[‘ ) cnt++;
    if (*dp == ‘]’ ) cnt--;
    dp++;
    }while (cnt);

// for ]
cnt=0;
do {
    if (*dp == ‘]‘ ) cnt++;
    if (*dp == ‘[’ ) cnt--;
    dp--;
    }while (cnt);

Jelly no have counters or ALU, but have excellent memory.

In Jelly, only one byte value can be accessed a time.

Then Jelly have now 3 modules:

1. Code: with one 74hc574, one at28c16, one 74HC193, some TTLs for clock

2. Data: with two 74hc574, two at28c16

3. Control: with two 74hc574, two at28c16

No more.

the eeprom at28c16 is just 2k x 8 bits, no need more.

(but need some extra logic chips for flags.)

Jelly now have two buses:

external/internal bus

       block bus      (BOB, ONE, TWO, HLT, RD, WR, BK, FW)

       data bus        (D0, D1, D2, D3, D4, D5, D6, D7)

       extra bus       (VCC, GND, CLK, HLT, R0, R1, R2, R4)

only internal bus

      code bus       (M0, M1, M2, M3, M4, M5, M6, M7) 

      block code    (CP0, OE0, CP1, OE1, M8, M9, M10, M11)

      block data    (CP2, OE2, CP3, OE3, OP0, OP1, OP2, OP3)

PS:   

D0-D7 are data bits, M0-M11 are eeprom address bits,

HLT main halt, CLK main clock, GND ground and VCC power,

OP0, OP1, OP2, OP3  select math operation

R0, R1, R2, R3  reserved for future use

Jelly is really, a finite state machine, running by lookup tables and executing a extended version of language brainfuck, called brainfunk, which have more 8 commands and a extra tape.

It should receive information from a code tape and translate into opcodes to execute, a classical Read-Eval-Print Loop, or REPL.

The simplest and easy way to filter income code tape bytes into opcodes, is just pass the byte as address to a translator eeprom and collect the result as valid opcodes to  use as address to another eeprom which contains the real signals states.

Then  big changes in project. From grouped chips boards, as one for eeproms, one for buffers, one for counters, one for tapes, what makes many groups of wires connecting boards, to modules that regroup in circuits to minimize signals and buses.

case of lookups

Jelly translate all byte code information into a set of 16 valid commands, which use microcodes to change control lines to sequences of predefined states of machine.

These sequences are stored in eeproms at addresses defined by, a low nibble of pipeline cycles (M0-M3), a middle nibble of opcodes (M4-M7) and a high nibble (M8-M11) for allow different pages.

With just 16 opcodes for and using 16 cycles of pipeline, then a complete code page occupies only 256 bytes.

case of buffers

In Jelly, all devices share same data bus and must don't have simultaneous access. 

The data bus is isolated by four 3-state buffers, one for input data to decode and execute, one for output control  to devices, one to input data to process, one to output processed data. 

Each buffer have a select and a enable signals, (CP) to import and hold data from and (OE) to export data into, the data bus. 

These signals are named as (CP0, OE0) for first buffer, (CP1, OE1) for the second, (CP2, OE2) for the third, (CP3, OE3) for the forth.

case of devices

Any microcontroller has three distinct information spaces, one for "code" to be executed, one for "data" to be processed, one for "in/out" devices access.

In Jelly, these spaces are like tapes, sequential access tapes, three tapes that can be selected, moved backwards or forwards in steps, and can be read or written.

The signals to the control tapes are,  (BOB) to select tape 0, (ONE) to select tape 1, (TWO) to select tape 2, (RD) to allow read, (WR) to allow writes, (FW) to move forward, (BK) to move backward, also a (HLT) halt signal for devices.

Note that, the input/output space allow multiple devices be connected and used.

An analogy is a unique memory device with  have three pointers de acesso

case of operations

In Jelly, only one byte value can be accessed a time.

There are just copy, increase, decrease, negate and clear, no math operations with dual operands.

Just one flag for when value is zero and one flag for when pipeline cycle is zero.

There are signals for data are only (UP) increase a value or (DN) decrease a value, also extra for (CP) copy a value and (CL) clear a value.

(Need some extra logic chips for flags.)

case of signals

In Jelly, all signals are not multiplexed and are combined as:

For (BOB, ONE, TWO), reserve 0b100, 0b001, 0b010 for exclusive selection of each tape, 0b000 for no tape, 0b111 for halt, and 0b101, 0b110, 0b011, to set internal flags for other actions.

For (RD, WR), set 0b00 to do nothing, 0b01 to read, 0b10 to write, and 0b11 to repeat the last action.

For (FW, BW), set 0b00 to do nothing, 0b01 backward, 0b10 forward, and 0b11 to repeat the last move.

For (UP, DN), set 0b00 to do nothing, 0b01 to increase, 0b10 to decrease, and 0b11 to repeat the last operation.

internal flags

When two tapes are selected ( 0b101, 0b110, 0b011 ), is invalid for access the tapes and must be wipe out of data bus but could be useful for control internal flags.

Jelly have a pipeline of 16 cycles, to coordenate by enable or disable the tape controlers, and define actions as, move forward or backward, perform  read or write, also command increase or decrease tape bytes. All that is made by control signals, then microcode is a state of signals.

For easy Jelly have one signal for each control and all microcode, the states of signals, are stored into eeproms.

More changes and ideas.  

A weekend immersed into logs and projects of homebrew computers and TTL systems from Hackaday and Facebook groups of Minimalist Computers, does evolution in projects, learning is the best pill.

The original idea was to make Jelly using only 7400 NAND chips, but using other 7400 chips, the board becomes very simple to wire and we can evaluate the results faster.

After a few tries, these are the prototype modules.

1) Interpreter, which translate bytes to valid opcodes. Done by a 74hc574 buffer and a mapped eeprom at28c16, results in 0-15 mapped as M4-M7;

2) Pipeline, a clocked counter for pipeline cycles. Done by a 74hc193, results in 0-15 mapped as M0-M3. For now ticks come from a 74hc00 oscillator;

3) Counter, a circuit to read a byte from tape, copy, increment, decrement or clear, and write into tape. Done by two at28c16 and two 74hc574 . Also a comparator with zero with two 74hc32;

4) Control, a circuit  to select which tape, select read from or write into, enable forward, backward or none move. Done by two at28c16 and two 74hc574. 

5) Some extra internal circuits to detect zero, swap tapes and change eeprom pages;

6) Some extra external circuits to emulate tapes.

All in standart universal PCBs fr-4 boards of 100 x 150 mm (connected as 3 x 2, 30x30cm or in a back plane ), with many LEDs colors.

Maybe latter when this proof of concept runs smooth, could make it with NANDs.

PS. I'm still learning to use KICad "on the fly" while waiting pieces from China.

*** I'm rewriting the logs, to review the order of changes ***

Jelly is not a common cpu.

There is no general registers, just 3-state buffers to keep the data bus safe. 

There is no arithmetic logical unit (ALU), just a eeprom with unary math results for copy, increment, decrement , negate and clear a byte.

There is  no comparator, just a flag is zero or not.

There is no input or output devices, just tapes to read or write,

There is no memory address, just moves to forward or to backward.

And Jelly executes a esoteric language.