Project Logs

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• Enclosure Updates

  Jesse Farrell • 3 days ago • 0 comments

  I've been working on an enclosure in the background using fusion 360. I have a couple tweaks to make to the enclosure, but for now this is what it looks like. STL files have been added to the project files. For future updates to the enclosure I'll edit this log.

• Blender Render - Side Quest

  Jesse Farrell • 11/07/2024 at 16:46 • 0 comments

  I opened up blender for the first time in two years to test out the pcb2blender plugin for Kicad (here). Shown below was my first attempt. I'm pretty happy with the results, but there's still lots of tweaking/learning ahead  [those LEDs for example]. I'll update this log later when I have some more time to play with the tool.

  Update - The next morning I was able to create this one. I'd really like to learn how to generate a realistic glow on the LEDs, but I think that will have to be a full weekend project. Coming from other CAD tools like fusion and KiCad, Blender has a very unintuitive user interface (I did the donut tutorial, but that was >2 years ago now).

  Second Update - I spent Saturday learning how to create a short animation, and how to create a more realistic lighting affect on my LEDs. For the LED’s I ended up separating the mesh using the “bisect” feature, and assigned a different material to the transparent portion of the LED. Then I placed a small point light source inside the transparent material. I did similar for the RJ45 connectors.

  To make the light blink I followed this handy tutorial (How to Make A Flickering Light in Blender), and for tips on the animation workflow I followed Blender Guru’s legendary donut tutorial (Part 12).

  Here’s the end result....

  In the future, I’d like to do another animation including the enclosure, and have the components dropped onto the PCBA. For now though, I’ll call my Blender side quest a success.

• Documentation Update

  Jesse Farrell • 11/04/2024 at 15:59 • 0 comments

  I did a big documentation push over the weekend and added 3000 words to my hardware architecture spec document. If your interested in the details of this project, or are looking to do something similar I recommend you take a look in this projects attached documents. 

  Note, its still technically unreleased since I need to add sections for creepage and clearance, validation and likely some other sections which don't exist yet.

• Rev1.0 Release

  Jesse Farrell • 10/20/2024 at 15:22 • 0 comments

  Quick update: The next revision of the board has now been ordered through JLCPCB. I’m using pick-and-place for about 95% of the board. The remaining parts are straightforward to solder or a one-off part. I couldn’t justify paying the reeling fee for the extended part.

  REV1.0 – Layout

  REV1.0 – 3D Model

• Creepage & Clearance - Attempting Standards

  Jesse Farrell • 10/09/2024 at 05:15 • 0 comments

  While I don’t know if I’m truly a green engineer anymore, I’m definitely a little wet behind the ears when it comes to standards. I thought it might be a good exercise to determine the creepage and clearance requirement for isolation on my ethernet circuit. The result was/is a large can of worms.

  ---

  What are the requirements?

   I’ve seen the requirement waved around on several occasions… ethernet transformers are designed to survive 1500Vac, and sure enough looking at 802.3 (IEEE standards that outline ethernet) you can find this spec listed in various locations throughout the PDF. Interestingly its only ONE of 3 possible isolation tests. from 802.3; “this electrical isolation shall withstand at least one of the following strength tests”. The other options include being exposed to 2250Vdc or a short impulse.

  Bare minimum – Withstand 1500Vac @60

  ---

  Approach Number 0

  The zeroth approach might be just to look at the IPC-2221B(?) design standard for C&C (creepage and clearance) recommendations. I didn’t go down this route. Though this standard can be invaluable, I don’t believe any safety standard would point us in its direction.

  ---

  Approach Number 1 - Start from the directives

  My first thought was to start from the directive and work down to the product standard, if one exists. I’m a little more familiar with the EU framework, so I’ll start there by looking at Harmonized Standards listed by the European Commission.

  Scrolling down the list there are several directives that would be of interest. General Product Safety (GPSD), Low Voltage (LVD), and Electromagnetic compatibility (EMCD). I’m adding the “D” here in the acronym since I’m referring to the directive (though I think GPSD is now a regulation?).

  NOTE. If you click on the directive and scroll down to the bottom of the webpage you can look at a “summary list as pdf document”, this is how I found the list of harmonized standards for each directive.

  Not having too much experience with standards my C&C spec could be hiding under any one of GPSD, LVD, or EMCD. I quickly learned my product doesn’t fall under the LVD since that directive covers “electrical equipment operating with an input or output voltage between 50-100Vac or 75-1500Vdc”. From the GPSD, it seems like I need to consider EN IEC 62368-1:2020, this standard concerns “Audio/video, information and communication technology equipment – Part 1 : Safety requirements”. My project is essentially a big communication adapter, so I believe it would comfortably fit here. From EMCD I’ll be looking into EN 61000-6-1:2007, EN 61000-6-3:2007, EN 55032:2015, and EN 55035:2017. These standards relate to immunity/emission “for residential, commercial and light-industrial environments” and “Electromagnetic compatibility of multimedia equipment”.

  Already I’m not a happy camper, this is a lot of overhead to get one value…

  After looking at each standard, it seems like 62368-1 has the info I need. Table 14 provides the “minimum clearances using required withstand voltage”. If I assume the definition of withstand voltage is the same between IEEE 802.3 and IEC, then I should be able to read the clearance right off the table. The lingering question is, does my application require reinforced insulation? Very likely it doesn’t, but I want to know how to find out.

  I read the entirety of the standard the next day and I wasn’t able to gain much clarity over my initial understanding. So much of the C&C is depended on a mains connection, which I do not have for my product. I’ll do some more reading but the expected C&C value is 1.5mm.

  Expected Clearance Requirement 1.5mm

  ---

  Approach Number 2 - When in doubt, phone a friend

  Every product with a CE mark needs to have a declaration of conformity (DoC) that outlines which standards the product complies to. If we can find a similar product’s...

  Read more »

• REV00 -> REV01 Fixes

  Jesse Farrell • 10/08/2024 at 04:14 • 0 comments

  I’ve returned from travel and started working on cleanup for 1 of 4 of my projects… this one I’m most excited about so it’s the chosen one.

  Based on my spark up I had a number of errata items to address. More than I’d care to admit; but in my defense this was somewhat by design, since I knowingly pushed the board to fab without running a number of my final checks. Everyone knows that the last 5% of the project is where all the work hides… sometimes its easier to debug in HW than to pour over datasheets for minor oversights.

  1) IC+ I1P75Gx – Termination Resistors

  We don’t need them parrallel/shunt termination for this PHY. It even says on the front page of the datasheet (BUT LITERALLY NOWHERE ELSE!!!) “built-in 50 ohm resistors for simplifying BOM”. Removing the 50ohm parallel termination resolved the comms issue I was having.

  2) USB Ports – Increase Capacitance

  I hadn’t read the spec before I did my design (a horrible sin). As a result, the capacitance on my USB ports are woefully out of spec. From the USB standard “downstream facing port Vbus power lines must be bypassed with no less than 120uF capacitance”. So, I’ll add 150uF electrolytics to each port.

  3) USB Port Pinout – Footprint Error

  I made a custom footprint for an interesting side mount USB connector… I should have triple checked the part. The ports are completely flipped. Instead of VBUS/D+/D-/GND, my footprint had GND/D-/D+/VBUS. To test the circuit for spark up I had to make a disgusting bodge. But it worked!

   4) FTDI – Pinout Error

  Another dumb mistake. I had my D+/D- flipped going into my RS232 converter. Nothing a bodge can’t fix though.

  5) Clock Stability – Bug

  My first board worked fine, but the second seemed to only briefly bootup, then power off after a few seconds. I was able to narrow it down to the clock on the USB to ETH adapter. I had to add a 1M feedback between XI/XO to ensure the clock remained stable (or would it be instable…). I already had the footprint there it was just DNP’d. Easy fix, no bodge this time.

  6) Power Switch Variant

  To toggle the power to each USB port I’m using a pair of N channel power switches (MIC2536). These were jellybean parts recommended by a reference design so I didn’t give them much thought. This lack of thought led me to buy the first variant I saw MIC2536-2… the enable is inverted on this version, what I needed was MIC2536-1. To continue spark up I just tied the enable to the appropriate rail.

• A Transformerless PHY to PHY Connection – Success (Sort of)

  Jesse Farrell • 05/29/2024 at 06:11 • 0 comments

  I was able to get the connection between the two PHY’s working, but more tuning is needed. As it stands, these are all just “eye-balled” values, and that really doesn’t sit well with me. What I really need to do is read the 10BASE-T and 100BASE-TX standards to better understand the underlying protocol. Even understanding the protocol, I still don’t know the exact architecture of either PHY. Nevertheless, I’ll post the results I have so far to document the journey.

  I’ve collected some A/B comparisons for the transformer (xfrm) and xfrm-less solutions. The control uses a Pulse H1102NL, and the xfrm-less solution uses either a resistor or capacitor in its place.

  So first let’s look at the change to TXP/TXN shown above. This signal is driven by LAN9514 (Current-Mode), and the MOD was a small series resistor. The main thing I noticed is a shift to the peak-peak value, and the dc-offset of the signal. I’m impressed how well it handled this change in impedance. 

  That was the sending end, now let’s see what’s received by I1P75G (net HUB_RXIP/N above). Its okay, though somewhat overly attenuated. I suspect some tweaking would be beneficial here!

  Next, we’ll look at the data on the sending end of voltage-mode driver (I1P75G). The MOD here was a pair of 100nF coupling caps. 

  I believe the ringing on the STOCK circuit can be explained as follows; When both HUB_TXIP(N) are equal then there won’t be any current flowing into the windings of the xfrm and it appears high impedance to the driver. Moreover, any small amount of current that is conducted through the center-tap and its small capacitor would be impeded by the common mode choke. Both these factors effect the load impedance seen by our voltage-mode line driver. 

  Lastly is the received signal at LAN9514. The signal looks great, but the DC offset is in need of some attention. The received signal is biased to 3V3, as a result the AC coupled signal rides on-top 3V3 and throws it up/down by 500mV. As a result, I’m likely overstressing the LAN9514 receiver.

  Transmission Line – Realization

  After stressing about the termination of the signal for longer than I care to admit, I came to the realization that its not particularly critical here. The rise times are ~3ns, so the frequency is approx. 117MHz (0.35/3). In FR4 that frequency has a wavelength of ~1.208meters. So the critical length would be about 60mm (λ/20), depending on who you ask.

  I’ll keep this in mind for my next round of changes. Atleast the link b/w my two PHY's is stable now!

• A Transformerless PHY to PHY Connection – Failed Attempt

  Jesse Farrell • 05/24/2024 at 04:55 • 0 comments

  The connection between the USB-ETH controller and the ETH switch doesn’t need to be isolated. Its on the same board with the same reference plane. I’ve included the transformer for now as a failsafe, but there’s a network of DNP’d parts on the backside of the PCB that will hopefully replace the transformer in REV01 (cost savings!).

  There are several application notes that outline transformerless PHY-PHY communication, but the exact implementation depends on the line-driver topology, and seems pretty silicon dependent. A good overview of the two line-driver topologies is provided in ENT-AN0106. The main takeaway are the two images shown below. 

  So how can we accomplish this without the transformer? There’s no reference design or app-note for my specific devices, so I’m going to need to do some research to better understand the topic. Based on the termination of the devices I believe LAN9512 uses a current-mode line driver, whereas I1P75G uses a voltage-mode line driver. Linked below are several app-notes I read to help design the interconnect.
  

  AN2190 - Transformerless Applications of Microchip’s Ethernet Devices (Current-Mode)

  TLK110 - Ethernet PHY Transformerless Operation (Current-Mode)

  RTL8305SC – Single Chip 5Port 10/100MBPS Switch Controller (Current-Mode)

  ANLAN120 – Capacitive Coupling Ethernet Transceivers without Using Transformers (Both Modes)

  ADI WIKI - ADIN1300 and ADIN1200 with Capacitive Coupling (Voltage-Mode)

  SNLA088A - AN1519 DP83848 PHYTER Transformerless Ethernet Operation (Current-Mode)

  Interfacing Intel® 8255x Fast Ethernet Controllers without Magnetics (Current-Mode)

  Maybe I was worried for nothing, the transformerless design looks suspiciously simple... In nearly every document the transformerless application is just a coupling capacitor placed in the signal path b/w the two PHY s. See example below from AN2190 (Current-Mode).
  

  Shown below is the existing biasing network for the current-mode line driver (LAN9512). Based on everything I’ve read I should just be able to remove the magnetics along with its supporting CT bias, and couple each data lines with a >15nF capacitor.

  On the voltage-mode side. I believe I’m able to directly connect each line to the coupling caps, since (I recently discovered) the device is internally biased. The final network is shown below.

  Oh boy does this not work. Probing the voltage-mode side (I1P75G), it seems like the bus is floating. It periodically droops down to GND, then shoot back to VCC.  I was able to get the link working but I’m still not happy with it… will discuss my solution in the next post.

• Cheap Chip Woes - Ethernet Switch

  Jesse Farrell • 05/16/2024 at 05:20 • 0 comments

  After getting most of the peripherals figured out in the design, I started delving deeper into the datasheets for the core components. I should be doing this earlier in my design, but this is a hobby project dang-it, I think I’m allotted a handful of poor decisions.

  Most of the parts had reasonably clear documentation, except for the cheap ethernet switch I selected early in the design. I’ve added the datasheet to the documents if you want to play along. Among the general lack of reference designs, I found the following…

  • PLLVCC (Pin7) – What do I connect it to!!!
    The datasheet doesn’t specify where this pin should be connected. Is the rail generated internal or do I need to power it externally? Is it especially sensitive, and maybe needs some ferrites, or just a local decoupling capacitor? If you search the entire datasheet for “PLLVCC” you’ll find two instances. One is the pin diagram, the other is the pin description, “Power of PLL circuit”.
    Resolution – For the first prototype I’ll add a jumper to power PLLVCC either from 3V3, 1V0, or leave floating w/ decoupling.

  • VREG_LDO (Pin41) – Min Capacitance?
    I’d really like it if the datasheet gave any sort of comment regarding output capacitance for the internally generated regulator. What is required for stability at least, or even a comment saying there IS no minimum….
    Resolution – Adding 0603 1uF Cout. Larger package allows for tweaks later if needed.

  • EEPROM – What Address?
    This one is pretty depressing, and would have been exceptionally easy to add correct. The device uses an external I2C EEPROM that can store configs that are loaded at startup. However, the address of this EEPROM isn’t specified.
    Resolution – Select EEPROM with configurable address. Sniff bus when prototype board arrives.

  • Magnetics Ect 
    This might be caused by my inexperience in networking related designs, but I’d really like to see some baseic design recommendations for the magnetics. My understanding is that the topology of the PHY can have several downstream affects for the termination / center tap on the transformer. Lacking this info, I’ll design in what seems most widely used.

• Early Design

  Jesse Farrell • 05/09/2024 at 05:00 • 0 comments

  Overview

  I’ve been thinking about making an ethernet switch for awhile and finally found a good reason to make my own. At work I often have to use 4 tools for high level debug;

  • Ethernet Switch
  • USB HUB – Lab Computers long since ran out of USB
  • USB to Ethernet Adapter
  • USB to RS232 Adapter – For debug

  It’s a real pain to have to scavenge all these adapters from around the lab, and the assortment of dongles takes up valuable bench space. The goal of this project is to Frankenstein these 4 devices into a single design.

  FYI for anyone reading. I’m not very familiar with the networking stack, so if I sound a bit uncertain about the topic it’s because I am… (part of the reason I wanted to do a project related to networking. Time to do some learning!)

  
  

  General Block Diagram

  I’m using a “keep it simple stupid” philosophy for this design. As such the block diagram looks eerily similar to the 4-tool amalgamation I just mentioned. Something that might be interesting is the PHY-PHY connection b/w the USB to ethernet adapter and the switch. I don’t need any isolation there, so no need for expensive magnetics.

  Now that I have the rough functionality worked out, I need to see what components are actually out there (and at what price!). As much as possible I’d like the design to be (a) cheap and (b) simple. I’ve been in firmware hell for another project, so I’ve had my fill of SW/FW debug for a while.

  
  

  Exploration - Ethernet Switch

  There really isn’t much on Digikey. At least not within my budget. Filtering for an in stock / non-marketplace / Ethernet switch, leaves me with several Microchip parts all >$5 at low quantity (see for yourself -> Digikey Search).

  Let’s see what China has to offer. LCSC conveniently has an entire page dedicated to “Ethernet Switches” (here). Filtering on cheapest in stock part lands me on IC Plus IP175G. Can’t say I’ve heard of this manufacturer but at ~$1 it has my attention.

  I’ve read through the datasheet and it seems like it fits the bill for my project. Its got an integrated MAC (thank God), decent buffers (I think?), and some more advanced features. Its recommended application is “5 port 10/100 Dumb swith” and “4TX+1FX Dumb Switcn”. The switch must be extra dumb!

  I did some hunting for reference design, but its very bleak. There’s no official reference design, nor is there any open-source example. The best I could find was this product (SwitchBlox Nano) uses the chip, so clearly someone got the chip working.

  
  

  Exploration – USB to Eth / HUB

  Digikey doesn’t seem to have ANY cheap options for a USB to ethernet adapter. In this case it seems like I can’t really avoid an expensive part, and I’m not sure I’d want to anyhow. I’d like a more widely available part with good support, so I don’t have to fight with any windows driver wackiness.

  I ended up going with the Microchip LAN951x series. Its an integrated USB to ethernet adapter coupled with a USB HUB. Its only USB 2.0, but for my use case I don’t need heaps of bandwidth. I haven’t done a deep dive of the datasheet yet, but it looks like I could easily use any of the 3 variants; LAN9512 / LAN9513 / LAN9514. The last digit reflects the number of USB ports present on the HUB. I’ll design in LAN9514 and DNP parts as needed to support the cheaper variants.  

  When searching for reference designs, it looks like this part is even used on the Raspberry Pi 3! That’s handy.

  
  

  Exploration – USB to RS232

  Another adapter that will be potential for windows driver wackiness. Similar to the previous adapter, I’d like to avoid the bottom of the barrel options. I suspect I’m overthinking the driver setup headaches, but I’ve never worked on a board that needs any kind of windows support so…. Rule number 1 “keep it simple stupid”.

  My first thought for RS232 support was FTDI, I think most designers have used or at least heard of this manufacturer,...

  Read more »

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