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• Finished!

  Pavel • 04/22/2017 at 08:00 • 1 comment

  The thing is now complete and working!

• Solution is found!

  Pavel • 04/20/2017 at 03:56 • 0 comments

  The humble diode AND was not to blame after all, it was prior wiring that was faulty.

  Here are simplified schematics with voltages:

  1) original wiring:

  collector of Q1 was wired directly to base of Q2, to achieve second inversion, thus making buffer; simultaneously from the same collector was the tap to the AND gate of decoder, as inverted input. Failed. the solution was to make this into two full-fledged invertors, and after this modification all started to work as it was intended to.

  2) corrected wiring:

• Problem with output logic levels

  Pavel • 04/14/2017 at 04:51 • 0 comments

  For decoder I used simplest diode 4AND logic gates (image), assuming they would work properly, and give +Vcc for high and 0.6V for low.

  Unfortunately, output for HIGH is measly 1.6-1.7V and it is too low for driving display unit.

  I am still cannot understand, why is it so.

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