I've been working on getting the computer synthesizable and ran into a snag. I thought the synthesis tool was going to be smart enough to convert the tri-state bus into a big mux bus, but it's not up to the task. At least as far as I can figure. So I have to choose to split the project into two parts - one that's synthesizable and one that represents the real components. I could keep trying to coax the tools to get it to do what I want, but I don't have a lot of confidence in that.

So I'll have to take all of my chips which output tri-state and change them to always output a distinct logic level. And then send all the individual buses into a giant mux. Considering my whole design is based on tri-state buses, then only the whole design will have to change. But maybe it's not so bad. It isn't hard to write muxes in VHDL. But there's lots of little changes. I'll have to keep a version of each since I'm eventually planning on making the discrete chip version.