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The challenge that this project addresses is to make connected instrumentation affordable (BeagleBone with the BeagleLogic cape is one of the cheapest yet feature-rich logic analyzer out there), enable remote debugging of hardware projects and provide an unconventional web-based user interface for the logic analyzer.
BeagleLogic is not just a Logic Analyzer but a full-featured Linux computer in the same package. BeagleLogic enables the user to not just capture logic data but also analyze them on the device itself as the powerful sigrok set of tools can run on top of the GNU/Linux OS running on the BeagleBoard hardware enabling in-situ protocol analysis, all on the BeagleLogic hardware itself.
BeagleLogic's web interface is the first of its kind ( as far as I am aware ) and will enable a much smoother out-of-the-box user experience than conventional logic analyzers. Today's browsers are very capable and with BeagleLogic I want to prove that a good web interface for a logic analyzer is both possible and achievable. Unfortunately the web interface that is currently available is very basic and could not be rebuilt in time for the competition, although this is high up on my priority list for the BeagleLogic project and I will make sure that this happens.
Implementation
To implement the BeagleLogic Standalone hardware I use the Octavo Systems' OSD3358 SIP [BeagleBone on a chip], as it incorporates all the essential components including the SoC, power management and DDR RAM and allows me to focus on the features I want to add.
1. Features
-> 16 logic channels @100MSa/s (vs max possible 14 on the BeagleBone)
-> Gigabit Ethernet Connectivity (vs max 100Mbps on the BeagleBone Black) via a Micrel KSZ9031 Gigabit PHY connected to the OSD3358 SiP. This will enable real-time sampling at higher rates than currently possible
I want to stress here that the 100Mbps link (either through Ethernet or USB - which is a little lower than 100Mbps) is a major bottleneck in getting data out of the BeagleBone. BeagleLogic can easily generate in excess of 100MB of data per second (that's 800Mbps!), and an interface that can get data out at the speed of 1000Mbps is a major improvement and should make sampling of 8 channels @100MSa/s in real time feasible.
-> 24-pin Expansion connector providing SPI, I2C, UART, PWM and GPIO ports for signal injection into host circuit
-> One USB-A host port for connecting external storage
-> Software Compatibility with the BeagleBoard ecosystem This will ensure that software designed to work with the BeagleBoard should also work with BeagleLogic out-of-the-box.
2. Licenses
The software is licensed in a mix of MIT and GNU GPL v2 Licenses (the kernel driver is under GPLv2, the web interface is MIT licensed). The hardware is released under the CERN Open Hardware License.
3. Documentation
Documentation for the project can be found at the project wiki but is being migrated over to Read the Docs, and eventually will be served over Read the Docs at https://beaglelogic.readthedocs.io.
4. Business Plan (also attached as a pdf in the "Files" section)
USP: In-situ protocol analysis (through the sigrok suite of software), networking capabilities enabling remote debugging of hardware projects, and the web-based interface (first-of-its-kind for a logic analyzer) at a very attractive price point near to, or a little bit above $100.
Target Market: Makers, single-board-computer users (including the BeagleBoard and the Raspberry Pi) and beginner-to-intermediate level engineers looking for a capable and expandable logic analyzer on a budget.
Competitive Advantage: There are a few logic analyzers in the up-to $100 category, including the Dangerous...
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I wonder on the progress of this project? ..