FPGA-based GPU as high speed learning platform

I've been making progress, I figured I'd dump some photos here for now. Not ready for a writeup yet. Converted design to a sprite engine which supports rasterization.

Messed around with bus priority on the SRAM and SDRAM, tweaked the JTAG command batch and sleep time.

Need to stick some FIFOs on the memory ports.

I figured if I had the GPU use the SDRAM, and let the display scan out of SRAM, I could avoid bottlenecks for display scanout. But there's still contention to copy from SDRAM to SRAM when the framebuffer is dirty, and if I let the LCD scanout have bus priority it takes a good 5 seconds per frame update..

Going to try inserting a FIFO into the display scanner that charges from SRAM,, with the display running at a fraction of the speed of the memory bus.

Update: With a scanline buffer it's significantly faster but still has a bit of a boxcar effect.

update: fixed the tearing a bit:

Porting the GPU over to the DE2-115 so I can have a 32 bit SDRAM bus. New display, 24BPP, but it's not self-scan. Will need to add a scanline fifo that is filled often enough for the display to be scanned out while the GPU masters the bus.

more device bitmap testing, fixed some batch issues, learned how to use signaltap, fixed some synchronization bugs, added a fifo for the gpu for less sleep() guesswork on the client side.

Software gradients being assisted by hardware color fills.

Tonight I improved software batch performance over JTAG and wrote some eye candy. Tested the hardware color fill and BLT paths, device bitmaps, etc.