32 bit MIPS CPU

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A five stage CPU core based on the MIPS instruction set

Reed Foster

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Branch Correction Correction
03/26/2016 at 16:34 • 0 comments

Debugging
As I was running some test code, I discovered that stale register data was being used to execute the jump register instruction. The fix for this was simple; I added a "new $s" signal from the forwarding registers to the branch correction. In addition, I also tidied up and simplified the branch correction.
Old Branch Correction
New Branch Correction
This simplified design is not only easier to understand, but it is also faster because there is no longer a chain of multiplexers that the "PCNext" signal has to propagate through.